Capgemini Engineering
Capgemini Engineering is seeking a Senior Analog/Mixed‑Signal Layout Engineer. This role focuses on leading and completing complex layout for deep submicron CMOS technologies.
Responsibilities
10+ years of experience in analog/mixed-signal layout design of deep submicron CMOS circuits and at least 3+ years of recent experience on advanced nodes including FinFET technologies
Experience with and knowledge of analog/mixed-signal IP (e.g., SERDES PHY, transmitter and receiver, PLL, DDR PHY, ADCs, DACs, LDOs, etc.)
Experience leading complex layout macros during the full design cycle from floorplan analysis to completion of physical design verification
Great understanding of CAD flows and tools related to analog/mixed-signal layout design
Experience crafting well‑matched, low noise, and low power analog blocks consisting of transistors, resistors, capacitors, pad IO's, ESD structures, etc.
High level of proficiency in custom, as well as standard cell-based, floor planning and hierarchical layout assembly
Must understand issues of IR drop, RC delay, electro‑migration, self‑heating and coupling capacitance
Must recognize failure‑prone circuit and layout structures, have experience with analog and DFM standard methodologies, and enthusiastically work with circuit designer or layout lead for the best approach to problems
High level of proficiency in interpretation of CALIBRE DRC, ERC, LVS, etc., reports
Knowledge of CADENCE or MENTOR GRAPHICS layout tools
Excellent interpersonal skills and able to work with remote teams
Role Overview
Lead layout team in completing complex layout for analog/mixed‑signal circuits in deep submicron CMOS technologies
Be a great role model, by inspiring and motivating team, and establishing effective organizational structure and communication protocols. Able to delegate and empower team along with effective time management.
Work with the circuit designer or layout‑lead to plan/schedule work and negotiate any layout trade‑offs as needed
Review floorplans and complex circuits with circuit designers
Run complete set of design verification tools available on AMS blocks
Interpret LVS, DRC and ERC reports to find the fastest way to complete layout
Utilize advanced CAD tools and mask design knowledge to deliver correct and robust layout that meets stringent matching performance, area, and power requirements
Your Skills and Experience
Synopsys/Cadence Analog Layout Tools (Preference: 5)
Virtuoso (Preference: 5)
Calibre (Preference: 5)
Python (Preference: 2)
Benefits
Flexible work
Healthcare including dental, vision, mental health, and well‑being programs
Financial well‑being programs such as 401(k) and Employee Share Ownership Plan
Paid time off and paid holidays
Paid parental leave
Family building benefits like adoption assistance, surrogacy, and cryopreservation
Social well‑being benefits like subsidized back‑up child/elder care and tutoring
Mentoring, coaching and learning programs
Employee Resource Groups
Disaster Relief
About Capgemini Engineering World leader in engineering & R&D services, Capgemini Engineering combines its broad industry knowledge and cutting‑edge technologies in digital and software to support the convergence of the physical and digital worlds.
Seniority level Mid‑Senior level
Employment type Full‑time
Job function Engineering and Information Technology
Industry IT Services and IT Consulting
Legal and EEO Statement Capgemini is an Equal Opportunity Employer encouraging diversity in the workplace. All qualified applicants will receive consideration for employment without regard to race, national origin, gender identity/expression, age, religion, disability, sexual orientation, genetics, veteran status, marital status or any other characteristic protected by law.
This is a general description of the Duties, Responsibilities and Qualifications required for this position. Physical, mental, sensory or environmental demands may be referenced in an attempt to communicate the manner in which this position traditionally is performed. Whenever necessary to provide individuals with disabilities an equal employment opportunity, Capgemini will consider reasonable accommodations that might involve varying job requirements and/or changing the way this job is performed, provided that such accommodations do not pose an undue hardship.
Capgemini is committed to providing reasonable accommodations during our recruitment process. If you need assistance or accommodation, please reach out to your recruiting contact.
Please be aware that Capgemini may capture your image (video or screenshot) during the interview process and that image may be used for verification, including during the hiring and onboarding process.
Click the following link for more information on your rights as an Applicant http://www.capgemini.com/resources/equal-employment-opportunity-is-the-law
Applicants for employment in the United States must have valid work authorization that does not now and/or will not in the future require sponsorship of a visa for employment authorization in the United States by Capgemini.
Capgemini discloses salary range information in compliance with state and local pay transparency obligations. The disclosed range represents the lowest to highest salary we, in good faith, believe we would pay for this role at the time of this posting, although we may ultimately pay more or less than the disclosed range and the range may be modified in the future. The disclosed range takes into account the wide range of factors that are considered in making compensation decisions including, but not limited to, geographic location, relevant education, qualifications, certifications, experience, skills, seniority, performance, sales or revenue‑based metrics, and business or organizational needs. At Capgemini, it is not typical for an individual to be hired at or near the top of the range for their role. The base salary range for the tagged location is [$76,200 - $156,310 /yr]. This role may be eligible for other compensation including variable compensation, bonus, or commission. Full‑time regular employees are eligible for paid time off, medical/dental/vision insurance, 401(k), and any other benefits to eligible employees. Note: No amount of pay is considered to be wages or compensation until such amount is earned, vested, and determinable. The amount and availability of any bonus, commission, or any other form of compensation that is allocable to a particular employee remains in the Company's sole discretion unless and until paid and may be modified at the Company’s sole discretion, consistent with the law
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Responsibilities
10+ years of experience in analog/mixed-signal layout design of deep submicron CMOS circuits and at least 3+ years of recent experience on advanced nodes including FinFET technologies
Experience with and knowledge of analog/mixed-signal IP (e.g., SERDES PHY, transmitter and receiver, PLL, DDR PHY, ADCs, DACs, LDOs, etc.)
Experience leading complex layout macros during the full design cycle from floorplan analysis to completion of physical design verification
Great understanding of CAD flows and tools related to analog/mixed-signal layout design
Experience crafting well‑matched, low noise, and low power analog blocks consisting of transistors, resistors, capacitors, pad IO's, ESD structures, etc.
High level of proficiency in custom, as well as standard cell-based, floor planning and hierarchical layout assembly
Must understand issues of IR drop, RC delay, electro‑migration, self‑heating and coupling capacitance
Must recognize failure‑prone circuit and layout structures, have experience with analog and DFM standard methodologies, and enthusiastically work with circuit designer or layout lead for the best approach to problems
High level of proficiency in interpretation of CALIBRE DRC, ERC, LVS, etc., reports
Knowledge of CADENCE or MENTOR GRAPHICS layout tools
Excellent interpersonal skills and able to work with remote teams
Role Overview
Lead layout team in completing complex layout for analog/mixed‑signal circuits in deep submicron CMOS technologies
Be a great role model, by inspiring and motivating team, and establishing effective organizational structure and communication protocols. Able to delegate and empower team along with effective time management.
Work with the circuit designer or layout‑lead to plan/schedule work and negotiate any layout trade‑offs as needed
Review floorplans and complex circuits with circuit designers
Run complete set of design verification tools available on AMS blocks
Interpret LVS, DRC and ERC reports to find the fastest way to complete layout
Utilize advanced CAD tools and mask design knowledge to deliver correct and robust layout that meets stringent matching performance, area, and power requirements
Your Skills and Experience
Synopsys/Cadence Analog Layout Tools (Preference: 5)
Virtuoso (Preference: 5)
Calibre (Preference: 5)
Python (Preference: 2)
Benefits
Flexible work
Healthcare including dental, vision, mental health, and well‑being programs
Financial well‑being programs such as 401(k) and Employee Share Ownership Plan
Paid time off and paid holidays
Paid parental leave
Family building benefits like adoption assistance, surrogacy, and cryopreservation
Social well‑being benefits like subsidized back‑up child/elder care and tutoring
Mentoring, coaching and learning programs
Employee Resource Groups
Disaster Relief
About Capgemini Engineering World leader in engineering & R&D services, Capgemini Engineering combines its broad industry knowledge and cutting‑edge technologies in digital and software to support the convergence of the physical and digital worlds.
Seniority level Mid‑Senior level
Employment type Full‑time
Job function Engineering and Information Technology
Industry IT Services and IT Consulting
Legal and EEO Statement Capgemini is an Equal Opportunity Employer encouraging diversity in the workplace. All qualified applicants will receive consideration for employment without regard to race, national origin, gender identity/expression, age, religion, disability, sexual orientation, genetics, veteran status, marital status or any other characteristic protected by law.
This is a general description of the Duties, Responsibilities and Qualifications required for this position. Physical, mental, sensory or environmental demands may be referenced in an attempt to communicate the manner in which this position traditionally is performed. Whenever necessary to provide individuals with disabilities an equal employment opportunity, Capgemini will consider reasonable accommodations that might involve varying job requirements and/or changing the way this job is performed, provided that such accommodations do not pose an undue hardship.
Capgemini is committed to providing reasonable accommodations during our recruitment process. If you need assistance or accommodation, please reach out to your recruiting contact.
Please be aware that Capgemini may capture your image (video or screenshot) during the interview process and that image may be used for verification, including during the hiring and onboarding process.
Click the following link for more information on your rights as an Applicant http://www.capgemini.com/resources/equal-employment-opportunity-is-the-law
Applicants for employment in the United States must have valid work authorization that does not now and/or will not in the future require sponsorship of a visa for employment authorization in the United States by Capgemini.
Capgemini discloses salary range information in compliance with state and local pay transparency obligations. The disclosed range represents the lowest to highest salary we, in good faith, believe we would pay for this role at the time of this posting, although we may ultimately pay more or less than the disclosed range and the range may be modified in the future. The disclosed range takes into account the wide range of factors that are considered in making compensation decisions including, but not limited to, geographic location, relevant education, qualifications, certifications, experience, skills, seniority, performance, sales or revenue‑based metrics, and business or organizational needs. At Capgemini, it is not typical for an individual to be hired at or near the top of the range for their role. The base salary range for the tagged location is [$76,200 - $156,310 /yr]. This role may be eligible for other compensation including variable compensation, bonus, or commission. Full‑time regular employees are eligible for paid time off, medical/dental/vision insurance, 401(k), and any other benefits to eligible employees. Note: No amount of pay is considered to be wages or compensation until such amount is earned, vested, and determinable. The amount and availability of any bonus, commission, or any other form of compensation that is allocable to a particular employee remains in the Company's sole discretion unless and until paid and may be modified at the Company’s sole discretion, consistent with the law
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