Intel Corporation
Overview
CPU Formal Verification Engineer role at Intel Corporation. Work within Intel's Silicon Engineering Group (SiG) to advance verification for server CPUs, collaborating with architects, RTL developers, and physical design teams. Responsibilities
Conduct verification of IP and/or SoC microarchitecture using formal verification tools, methodologies, and technologies based on model checking and equivalence checking algorithms. Create comprehensive formal verification test and coverage plans including definition of formal verification scope, strategy, and techniques. Create abstraction models for convergence on the design, carve out the right boundaries for the design, and track, verify, and apply abstraction techniques. Develop formal proofs to implement the verification plan, review the completed proofs, and develop new formal verification methodologies. Perform convergence on design by creating formal verification methodology, abstraction, and simulation techniques. Find and implement corrective measures to resolve failing tests. Collaborate with architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features. Document test plans and drive technical reviews of plans and proofs with design and architecture teams. Maintain and improve existing functional verification infrastructure and methodology. Understand and address binary decision diagrams (BDD) and data flow graphs (DFG) for data paths and BDD complexity on arithmetic; apply modeling concepts to prove protocols and architectures. The Mindset
Intellectual Curiosity – Question assumptions, dig deeper, and identify verification gaps. Collaborative Excellence – Thrive in cross-functional partnerships with architects, designers, and verification engineers. Technical Leadership – Distill formal verification concepts into clear, actionable insights for diverse audiences. Adaptive Innovation – Pivot when designs evolve and turn challenges into verification opportunities. Results-Driven Impact – Deliver verification quality that provides Intel confidence in silicon. Qualifications
Minimum Qualifications
You must possess a B.S. in Computer Engineering/ Electrical Engineering or any STEM Degree with 6+ years of experience; OR a M.S. in Computer Engineering/ Electrical Engineering or any STEM Degree with 4+ years of experience; OR a PhD in Computer Engineering/ Electrical Engineering or any STEM Degree with 6+ months of experience. The Experience Must Include
Computer architecture knowledge with emphasis on out-of-order processor execution, memory hierarchy, and memory management. Hands-on experience with industry-standard formal verification tools such as JasperGold, Questa Formal, VC Formal. Experience with formal abstractions and other complexity reduction techniques. Experience with a hardware modeling language, such as Verilog, VHDL, SystemVerilog, and industry-standard logic simulation tools. Experience in assertion writing, checker development, coverage analysis, failure debug, root cause analysis. Knowledge of Intel Architecture ISA and system architecture, x86 assembly language (preferred). Preferred Qualifications
Post-silicon debug and analysis. Research publications, patent filings, or other evidence of personal technical innovation in validation methodology advancement. Experience applying sequential equivalence checking in complex micro-architectures. Programming experience in C/C++, Python, Perl, Ruby, Java, TCL, or similar. Intel or industry experience in pre-silicon verification of CPU cores with relevant technical ownership/expertise. Job Details
Job Type: Experienced Hire Shift: Shift 1 (United States of America) Primary Location: US, Oregon, Hillsboro Additional Locations: US, California (Santa Clara), US, Texas (Austin) Business Group
The Silicon Engineering Group (SIG) focuses on development and integration of SOCs, Cores, and critical IPs from architecture to manufacturing readiness to power Intel’s leadership products. Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, ancestry, age, disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender identity, sexual orientation, or any other characteristic protected by law. Benefits and Compensation
We offer a total compensation package including competitive pay, stock, bonuses, and benefits. Annual salary range for US roles: $139,710.00 - $197,230.00. Details vary by location and qualifications; recruiters can share more. Work Model
This role will require on-site presence. Job posting details are subject to change.
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CPU Formal Verification Engineer role at Intel Corporation. Work within Intel's Silicon Engineering Group (SiG) to advance verification for server CPUs, collaborating with architects, RTL developers, and physical design teams. Responsibilities
Conduct verification of IP and/or SoC microarchitecture using formal verification tools, methodologies, and technologies based on model checking and equivalence checking algorithms. Create comprehensive formal verification test and coverage plans including definition of formal verification scope, strategy, and techniques. Create abstraction models for convergence on the design, carve out the right boundaries for the design, and track, verify, and apply abstraction techniques. Develop formal proofs to implement the verification plan, review the completed proofs, and develop new formal verification methodologies. Perform convergence on design by creating formal verification methodology, abstraction, and simulation techniques. Find and implement corrective measures to resolve failing tests. Collaborate with architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features. Document test plans and drive technical reviews of plans and proofs with design and architecture teams. Maintain and improve existing functional verification infrastructure and methodology. Understand and address binary decision diagrams (BDD) and data flow graphs (DFG) for data paths and BDD complexity on arithmetic; apply modeling concepts to prove protocols and architectures. The Mindset
Intellectual Curiosity – Question assumptions, dig deeper, and identify verification gaps. Collaborative Excellence – Thrive in cross-functional partnerships with architects, designers, and verification engineers. Technical Leadership – Distill formal verification concepts into clear, actionable insights for diverse audiences. Adaptive Innovation – Pivot when designs evolve and turn challenges into verification opportunities. Results-Driven Impact – Deliver verification quality that provides Intel confidence in silicon. Qualifications
Minimum Qualifications
You must possess a B.S. in Computer Engineering/ Electrical Engineering or any STEM Degree with 6+ years of experience; OR a M.S. in Computer Engineering/ Electrical Engineering or any STEM Degree with 4+ years of experience; OR a PhD in Computer Engineering/ Electrical Engineering or any STEM Degree with 6+ months of experience. The Experience Must Include
Computer architecture knowledge with emphasis on out-of-order processor execution, memory hierarchy, and memory management. Hands-on experience with industry-standard formal verification tools such as JasperGold, Questa Formal, VC Formal. Experience with formal abstractions and other complexity reduction techniques. Experience with a hardware modeling language, such as Verilog, VHDL, SystemVerilog, and industry-standard logic simulation tools. Experience in assertion writing, checker development, coverage analysis, failure debug, root cause analysis. Knowledge of Intel Architecture ISA and system architecture, x86 assembly language (preferred). Preferred Qualifications
Post-silicon debug and analysis. Research publications, patent filings, or other evidence of personal technical innovation in validation methodology advancement. Experience applying sequential equivalence checking in complex micro-architectures. Programming experience in C/C++, Python, Perl, Ruby, Java, TCL, or similar. Intel or industry experience in pre-silicon verification of CPU cores with relevant technical ownership/expertise. Job Details
Job Type: Experienced Hire Shift: Shift 1 (United States of America) Primary Location: US, Oregon, Hillsboro Additional Locations: US, California (Santa Clara), US, Texas (Austin) Business Group
The Silicon Engineering Group (SIG) focuses on development and integration of SOCs, Cores, and critical IPs from architecture to manufacturing readiness to power Intel’s leadership products. Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, ancestry, age, disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender identity, sexual orientation, or any other characteristic protected by law. Benefits and Compensation
We offer a total compensation package including competitive pay, stock, bonuses, and benefits. Annual salary range for US roles: $139,710.00 - $197,230.00. Details vary by location and qualifications; recruiters can share more. Work Model
This role will require on-site presence. Job posting details are subject to change.
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