Qualcomm
Join to apply for the Mixed Signal SVE Engineer role at Qualcomm.
Company Qualcomm Technologies, Inc.
Job Area Engineering Group, Engineering Group > ASICS Engineering
General Summary Qualcomm is a company of inventors that unlocked 5G – ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. Qualcomm CDMA Technologies, a.k.a. QCT – http://www.qualcomm.com/qct/ – is the world leader in wireless ICs powering the majority of 3G & 4G devices and is the largest fabless semiconductor in the world.
About The Role The Mixed Signal SVE team is looking for a talented engineer to support silicon bring‑up and validation of mixed signal IPs such as DDRPHY and SerDes. In this role, you’ll work closely with cross‑functional teams—including PHY Design, Firmware, PTE, and Software—to bring up PHYs and debug complex issues.
Key Responsibilities
Lead bring‑up, debugging, and optimization of DDR/SerDes PHYs across post‑silicon teams.
Proactively identify and resolve issues to ensure successful product launches.
Provide post‑release support for PHY‑related customer issues.
Develop firmware and execute regression testing.
Generate clear and detailed test reports and documentation.
Preferred Qualifications
Hands‑on experience with DDR/SerDes test development, debugging, and characterization.
Proficiency in firmware development and scripting (Python preferred).
Solid understanding of JEDEC and other electrical/protocol specifications.
Strong grasp of PHY circuitry fundamentals (DLLs, I/O, calibration).
Familiarity with signal integrity and probing techniques for memory buses.
Skilled in using lab instruments (oscilloscopes, spectrum analyzers, logic analyzers, etc.).
Detail‑oriented with a focus on quality and ownership of deliverables.
Excellent communication skills—both verbal and written.
Experience with hands‑on lab work, including soldering and system instrumentation.
Experience applying machine learning or data science techniques to hardware validation or silicon debug.
Knowledge of statistical modeling and data visualization for large‑scale silicon test datasets.
Ability to build and maintain automated pipelines for data collection, labeling, and model training.
Understanding how AI can be used to enhance lab instrumentation workflows and regression analysis.
Minimum Qualifications
Bachelor’s degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
Master’s degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
Equal Employment Opportunity Qualcomm is an equal‑opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e‑mail disability‑accommodations@qualcomm.com or call Qualcomm's toll‑free number. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities.
Pay Range And Other Compensation & Benefits $140,000.00 – $210,000.00. The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. In addition to base salary, Qualcomm offers a competitive annual discretionary bonus program, RSU grants, and a comprehensive benefits package. View full U.S. benefits details.
#J-18808-Ljbffr
Company Qualcomm Technologies, Inc.
Job Area Engineering Group, Engineering Group > ASICS Engineering
General Summary Qualcomm is a company of inventors that unlocked 5G – ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. Qualcomm CDMA Technologies, a.k.a. QCT – http://www.qualcomm.com/qct/ – is the world leader in wireless ICs powering the majority of 3G & 4G devices and is the largest fabless semiconductor in the world.
About The Role The Mixed Signal SVE team is looking for a talented engineer to support silicon bring‑up and validation of mixed signal IPs such as DDRPHY and SerDes. In this role, you’ll work closely with cross‑functional teams—including PHY Design, Firmware, PTE, and Software—to bring up PHYs and debug complex issues.
Key Responsibilities
Lead bring‑up, debugging, and optimization of DDR/SerDes PHYs across post‑silicon teams.
Proactively identify and resolve issues to ensure successful product launches.
Provide post‑release support for PHY‑related customer issues.
Develop firmware and execute regression testing.
Generate clear and detailed test reports and documentation.
Preferred Qualifications
Hands‑on experience with DDR/SerDes test development, debugging, and characterization.
Proficiency in firmware development and scripting (Python preferred).
Solid understanding of JEDEC and other electrical/protocol specifications.
Strong grasp of PHY circuitry fundamentals (DLLs, I/O, calibration).
Familiarity with signal integrity and probing techniques for memory buses.
Skilled in using lab instruments (oscilloscopes, spectrum analyzers, logic analyzers, etc.).
Detail‑oriented with a focus on quality and ownership of deliverables.
Excellent communication skills—both verbal and written.
Experience with hands‑on lab work, including soldering and system instrumentation.
Experience applying machine learning or data science techniques to hardware validation or silicon debug.
Knowledge of statistical modeling and data visualization for large‑scale silicon test datasets.
Ability to build and maintain automated pipelines for data collection, labeling, and model training.
Understanding how AI can be used to enhance lab instrumentation workflows and regression analysis.
Minimum Qualifications
Bachelor’s degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
Master’s degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
Equal Employment Opportunity Qualcomm is an equal‑opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e‑mail disability‑accommodations@qualcomm.com or call Qualcomm's toll‑free number. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities.
Pay Range And Other Compensation & Benefits $140,000.00 – $210,000.00. The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. In addition to base salary, Qualcomm offers a competitive annual discretionary bonus program, RSU grants, and a comprehensive benefits package. View full U.S. benefits details.
#J-18808-Ljbffr