Neurophos
Job Title:
Head of AI Photonics Packaging Location:
Austin, TX or San Francisco Bay Area, CA Type:
Full Time About Neurophos
At Neurophos, we are revolutionizing AI computation with a groundbreaking photonic module that promises to redefine industry standards. After three years of stealth R&D, we have engineered a technology platform delivering 100x performance gains in neural network computing—powering applications like Large Language Models (LLMs) and next-generation AI architectures. By integrating metamaterials with conventional optoelectronics, our compute‑in‑memory optical system surpasses existing solutions, paving the way for the future of AI hardware. We are scaling our elite engineering team to bring this transformative technology to market. Join us to shape the future of optical computing. Position Overview
We are seeking a highly experienced leader in advanced packaging to build and guide a talented team, driving the development of cutting‑edge solutions for multi‑chip packages (MCPs) and high‑speed silicon photonics integration. This role involves overseeing the full lifecycle from conceptual design through prototyping, qualification, and scaling to high‑volume manufacturing, while managing partnerships with foundries and assembly providers to ensure cost efficiency and manufacturability. You will focus on innovative packaging for active metamaterials, silicon photonic devices, and advanced digital electronics, with a strong emphasis on co‑packaged optics, thermal management, and risk mitigation. This position offers the chance to tackle complex challenges, innovate in optical and AI technologies, and contribute to a startup poised for significant impact, with hands‑on involvement in both early‑stage prototyping and high‑volume production. Key Responsibilities
Build, lead, and mentor a high‑performing team of packaging engineers and specialists; set objectives, allocate resources, provide guidance, and conduct performance evaluations to achieve key milestones. Drive the development of advanced packaging processes, including through‑silicon vias (TSVs), wafer‑level integration, and 2.5D/3D assembly (such as CoWoS or equivalent technologies), in partnership with OSATs, to advance from early prototypes to high‑volume production while identifying and addressing technical risks. Collaborate with cross‑functional teams in silicon photonics, mixed‑signal design, and optical engineering to design package architectures, select materials, and optimize interconnects for performance and cost. Interface with the reliability team to support process qualification and testing, ensuring packages align with standards for thermal‑mechanical stability and long‑term operation within budget constraints. Manage internal and vendor resources to align with company timelines, fostering innovation in packaging solutions and contributing to technology roadmaps. Analyze data from prototyping, testing, and failure modes to refine designs, document processes, and support seamless transitions to high‑volume production. Perform hands‑on work in lab settings, such as assembling and testing early prototypes to validate concepts and iterate designs. Qualifications
Advanced degree (Master's or Ph.D.) in Electrical Engineering, Mechanical Engineering, Materials Science, Applied Physics, or a related field. 10+ years of hands‑on experience in semiconductor packaging technology development, including design, simulation, and process optimization. Deep expertise in advanced packaging methods such as flip‑chip, wafer‑level packaging, 3D stacking, and high‑speed interconnects. Proven track record of developing CoWoS or similar high‑density/high‑speed 2.5D/3D integration technologies and getting them to market. Demonstrated experience leading packaging projects from initial concept through prototyping, qualification, and ramp‑up to high‑volume manufacturing. Deep understanding of signal integrity and interconnect + packaging techniques for handling high‑speed (multi‑GHz) signals. Solid experience with thermal, mechanical, and electrical/optical modeling tools (e.g., ANSYS). Familiarity with cross‑functional aspects of packaging, including design rules, BOM, DFM/DFT, and cost considerations. Excellent problem‑solving abilities, grounded in scientific principles and engineering best practices, with a willingness to engage in hands‑on lab work. Strong communication skills for engaging with internal teams and external partners, with the ability to present technical updates at senior levels. Ability to thrive in a fast‑paced, dynamic environment with minimal supervision, prioritizing tasks effectively. Preferred Qualifications
Demonstrated leadership in managing teams, including hiring, mentoring, and resource management. Expertise in optical modules, assembly processes, and integration techniques. Proficiency in finite element analysis (FEA) for complex simulations. Background in environmental stress testing methodologies (e.g., thermal cycling, vibration). What We Offer
A key role in a cutting‑edge AI hardware startup. A collaborative and innovative work environment. Competitive compensation. Opportunities for personal and professional growth in a dynamic industry. If you are a passionate and talented Advanced Packaging Engineer who thrives on challenges and innovation, we encourage you to apply.
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Head of AI Photonics Packaging Location:
Austin, TX or San Francisco Bay Area, CA Type:
Full Time About Neurophos
At Neurophos, we are revolutionizing AI computation with a groundbreaking photonic module that promises to redefine industry standards. After three years of stealth R&D, we have engineered a technology platform delivering 100x performance gains in neural network computing—powering applications like Large Language Models (LLMs) and next-generation AI architectures. By integrating metamaterials with conventional optoelectronics, our compute‑in‑memory optical system surpasses existing solutions, paving the way for the future of AI hardware. We are scaling our elite engineering team to bring this transformative technology to market. Join us to shape the future of optical computing. Position Overview
We are seeking a highly experienced leader in advanced packaging to build and guide a talented team, driving the development of cutting‑edge solutions for multi‑chip packages (MCPs) and high‑speed silicon photonics integration. This role involves overseeing the full lifecycle from conceptual design through prototyping, qualification, and scaling to high‑volume manufacturing, while managing partnerships with foundries and assembly providers to ensure cost efficiency and manufacturability. You will focus on innovative packaging for active metamaterials, silicon photonic devices, and advanced digital electronics, with a strong emphasis on co‑packaged optics, thermal management, and risk mitigation. This position offers the chance to tackle complex challenges, innovate in optical and AI technologies, and contribute to a startup poised for significant impact, with hands‑on involvement in both early‑stage prototyping and high‑volume production. Key Responsibilities
Build, lead, and mentor a high‑performing team of packaging engineers and specialists; set objectives, allocate resources, provide guidance, and conduct performance evaluations to achieve key milestones. Drive the development of advanced packaging processes, including through‑silicon vias (TSVs), wafer‑level integration, and 2.5D/3D assembly (such as CoWoS or equivalent technologies), in partnership with OSATs, to advance from early prototypes to high‑volume production while identifying and addressing technical risks. Collaborate with cross‑functional teams in silicon photonics, mixed‑signal design, and optical engineering to design package architectures, select materials, and optimize interconnects for performance and cost. Interface with the reliability team to support process qualification and testing, ensuring packages align with standards for thermal‑mechanical stability and long‑term operation within budget constraints. Manage internal and vendor resources to align with company timelines, fostering innovation in packaging solutions and contributing to technology roadmaps. Analyze data from prototyping, testing, and failure modes to refine designs, document processes, and support seamless transitions to high‑volume production. Perform hands‑on work in lab settings, such as assembling and testing early prototypes to validate concepts and iterate designs. Qualifications
Advanced degree (Master's or Ph.D.) in Electrical Engineering, Mechanical Engineering, Materials Science, Applied Physics, or a related field. 10+ years of hands‑on experience in semiconductor packaging technology development, including design, simulation, and process optimization. Deep expertise in advanced packaging methods such as flip‑chip, wafer‑level packaging, 3D stacking, and high‑speed interconnects. Proven track record of developing CoWoS or similar high‑density/high‑speed 2.5D/3D integration technologies and getting them to market. Demonstrated experience leading packaging projects from initial concept through prototyping, qualification, and ramp‑up to high‑volume manufacturing. Deep understanding of signal integrity and interconnect + packaging techniques for handling high‑speed (multi‑GHz) signals. Solid experience with thermal, mechanical, and electrical/optical modeling tools (e.g., ANSYS). Familiarity with cross‑functional aspects of packaging, including design rules, BOM, DFM/DFT, and cost considerations. Excellent problem‑solving abilities, grounded in scientific principles and engineering best practices, with a willingness to engage in hands‑on lab work. Strong communication skills for engaging with internal teams and external partners, with the ability to present technical updates at senior levels. Ability to thrive in a fast‑paced, dynamic environment with minimal supervision, prioritizing tasks effectively. Preferred Qualifications
Demonstrated leadership in managing teams, including hiring, mentoring, and resource management. Expertise in optical modules, assembly processes, and integration techniques. Proficiency in finite element analysis (FEA) for complex simulations. Background in environmental stress testing methodologies (e.g., thermal cycling, vibration). What We Offer
A key role in a cutting‑edge AI hardware startup. A collaborative and innovative work environment. Competitive compensation. Opportunities for personal and professional growth in a dynamic industry. If you are a passionate and talented Advanced Packaging Engineer who thrives on challenges and innovation, we encourage you to apply.
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