NESCO Inc is hiring: Contract Hardware Engineer Mid. in Mountain View

Location: USA, Remote
What You'll Be Doing:
Strong expertise on Arteris Design Toolset
At-least 5+ years of experience in Verilog Design
AMBA AXI bus along-with ARM or C based processor
Ensure customer satisfaction.
Reporting to customers on daily or weekly progress effectively.
What We Are Looking For:
Develop and test RTL modules on AMD/Xilinx FPGA devices (required) and ASIC targets (preferred)
Develop and maintain build/simulation scripts
Write test cases using Python to validate our design
Create software interfaces from our FPGA-based systems to Windows and Linux systems software at the HAL layer
Collaborate in a team environment across multiple engineering disciplines and with researchers.
5+ years of FPGA design experience using Verilog, SystemVerilog
5+ years of experience in AMD/Xilinx FPGA design (Versal and Kintex/Virtex UltraScale+ desired, 7-series minimum)
Experience using industry standard Xilinx Vivado to bring up initial system, integrate peripheral components, and test and debug design
Programming experience in one or more scripting languages: Python, tcl, shell scripts, or equivalent EDA tool scripting languages.
10+ years of experience in FPGA design and development
Experience with RTL to GDS flows on modern processes like TSMC N7
Experience with serial interfaces like SPI, I2C and video/camera interfaces like MIPI DSI/CSI
Proven track record of successfully deploying FPGA solutions across production systems or research prototypes
Programming experience in C and/or C++
Experience developing accompanying firmware to exercise and drive FPGA prototypes

Location: USA, Remote
What You'll Be Doing:
Strong expertise on Arteris Design Toolset
At-least 5+ years of experience in Verilog Design
AMBA AXI bus along-with ARM or C based processor
Ensure customer satisfaction.
Reporting to customers on daily or weekly progress effectively.
What We Are Looking For:
Develop and test RTL modules on AMD/Xilinx FPGA devices (required) and ASIC targets (preferred)
Develop and maintain build/simulation scripts
Write test cases using Python to validate our design
Create software interfaces from our FPGA-based systems to Windows and Linux systems software at the HAL layer
Collaborate in a team environment across multiple engineering disciplines and with researchers.
5+ years of FPGA design experience using Verilog, SystemVerilog
5+ years of experience in AMD/Xilinx FPGA design (Versal and Kintex/Virtex UltraScale+ desired, 7-series minimum)
Experience using industry standard Xilinx Vivado to bring up initial system, integrate peripheral components, and test and debug design
Programming experience in one or more scripting languages: Python, tcl, shell scripts, or equivalent EDA tool scripting languages.
10+ years of experience in FPGA design and development
Experience with RTL to GDS flows on modern processes like TSMC N7
Experience with serial interfaces like SPI, I2C and video/camera interfaces like MIPI DSI/CSI
Proven track record of successfully deploying FPGA solutions across production systems or research prototypes
Programming experience in C and/or C++
Experience developing accompanying firmware to exercise and drive FPGA prototypes

Nesco Resource offers a comprehensive benefits package for our associates, which includes a MEC (Minimum Essential Coverage) plan that encompasses Medical, Vision, Dental, 401K, and EAP (Employee Assistance Program) services.

Nesco Resource provides equal employment opportunities to all employees and applicants for employment and prohibits discrimination and harassment of any type without regard to race, color, religion, age, sex, national origin, disability status, genetics, protected veteran status, sexual orientation, gender identity or expression, or any other characteristic protected by federal, state, or local laws.