NAM Info Inc
Hardware Design Engineer with PCI/PCIE
NAM Info Inc, Milpitas, California, United States, 95035
Position:
Hardware Design Engineer with PCI/PCIE
Location:
Milpitas, CA (Fully onsite)
Duration:
06+ Months Contract
Job Description Hardware design and test engineer responsible for end‑to‑end development of micro‑controller and micro‑processor based boards, including component selection, PCB layout, implementation, and validation.
Responsibilities
Lead the design, implementation, and validation of embedded systems from requirement analysis to board bring‑up.
Perform PCB layout design with Cadence Allegro, ensuring signal integrity, EMI/EMC, and manufacturability.
Prepare and execute functional, DVT, and board bring‑up tests using power supply, multimeter, oscilloscopes, and logic analyzers.
Collaborate with cross‑functional teams to ensure compliance with performance, cost, and regulatory requirements.
Qualifications
10-15 years of relevant experience as a hardware design and test engineer.
Bachelor’s degree in electrical, electronics engineering, or equivalent.
Expertise in interface technologies: DDR3/4/5, PCIe Gen 4 (or higher), SATA, USB 3.0/4.0, Ethernet, display, audio, SPI, I2C.
Independent design of micro‑controller and micro‑processor based boards with peripherals such as ADCs, DACs, storage, Ethernet PHYs.
Strong problem‑solving, debugging skills, and attention to detail.
Excellent written and oral communication.
Good to have
Pre‑compliance screening for EMI/EMC/Safety at third‑party labs.
Reliability analysis (DFMEA, MTBF prediction, HALT, ESS).
Experience with high‑speed interfaces: PCIe Gen 5/6, USB4.x, DDR5, 10G/100G Ethernet.
Signal integrity and compliance testing.
Seniority Level Mid‑Senior
Employment Type Contract
Job Function Design
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Hardware Design Engineer with PCI/PCIE
Location:
Milpitas, CA (Fully onsite)
Duration:
06+ Months Contract
Job Description Hardware design and test engineer responsible for end‑to‑end development of micro‑controller and micro‑processor based boards, including component selection, PCB layout, implementation, and validation.
Responsibilities
Lead the design, implementation, and validation of embedded systems from requirement analysis to board bring‑up.
Perform PCB layout design with Cadence Allegro, ensuring signal integrity, EMI/EMC, and manufacturability.
Prepare and execute functional, DVT, and board bring‑up tests using power supply, multimeter, oscilloscopes, and logic analyzers.
Collaborate with cross‑functional teams to ensure compliance with performance, cost, and regulatory requirements.
Qualifications
10-15 years of relevant experience as a hardware design and test engineer.
Bachelor’s degree in electrical, electronics engineering, or equivalent.
Expertise in interface technologies: DDR3/4/5, PCIe Gen 4 (or higher), SATA, USB 3.0/4.0, Ethernet, display, audio, SPI, I2C.
Independent design of micro‑controller and micro‑processor based boards with peripherals such as ADCs, DACs, storage, Ethernet PHYs.
Strong problem‑solving, debugging skills, and attention to detail.
Excellent written and oral communication.
Good to have
Pre‑compliance screening for EMI/EMC/Safety at third‑party labs.
Reliability analysis (DFMEA, MTBF prediction, HALT, ESS).
Experience with high‑speed interfaces: PCIe Gen 5/6, USB4.x, DDR5, 10G/100G Ethernet.
Signal integrity and compliance testing.
Seniority Level Mid‑Senior
Employment Type Contract
Job Function Design
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