Astera Labs is hiring: Senior Hardware Electrical Validation Engineer in San Jos

Senior Hardware Electrical Validation Engineer Join Astera Labs, a company advancing AI infrastructure through purpose‑built connectivity solutions. As a Senior Hardware Electrical Validation Engineer, you will link the Hardware Electrical Design teams and Post‑Silicon Electrical Validation teams, ensuring robust design and validation of high‑performance components. Key Responsibilities Support Hardware Electrical Design teams by de‑risking circuits and modules from project kickoff to gerber output. Develop comprehensive validation plans using correct test methods and processes. Bring PCBA samples to the lab, execute validation plans, and validate all circuits. Debug complex multi‑point failures in hardware (power regulators, DPMs, clock synthesizers, digital control paths, I2C, SPI, etc.). Rework components on PCBAs to unblock debugging activities. Pre‑empt and de‑risk system validation architectures in collaboration with System Validation teams. Support hardware activities in auxiliary teams such as Post‑Silicon Validation, Product Apps, System Validation, FAEs. Leverage existing product knowledge to de‑risk new features and requirements. Stay informed on new industry test standards and equipment to introduce modern testing methodologies. Specify test equipment, develop fixtures, and help improve hardware lab functions. Required Skills Strong electrical engineering skills, circuit analysis, and debugging experience. Bachelor’s degree in EE with 3+ years of hardware test or design experience. Comprehensive knowledge of electronic circuits and testing processes. Ability to produce test descriptions from a schematic, execute, and document results. Knowledge of the full hardware product lifecycle from kickoff to RTM. Lab experience with oscilloscopes, e‑loads, VNA, TDR, environmental chambers, etc. Experience with automating lab equipment; Python preferred. Preferred Skills Experience with PLM tools such as Arena. Measurement of high‑speed interfaces (PCIe, DDR, SERDES). EMI/EMC compliance knowledge. Technical writing skills (ECOs, Bug Reports, Rework WIs, MCOs). Understanding of ASIC/silicon product development processes. Base salary range: $147,000 USD – $195,000 USD. Location: Sunnyvale, CA. We actively encourage applicants from diverse backgrounds, including people of color, LGBTQ+ and non‑binary people, veterans, parents, and people with disabilities. Seniority level: Mid‑Senior level. Employment type: Full‑time. #J-18808-Ljbffr