NVIDIA
Senior Design Engineer, Coherent High Speed Interconnect
NVIDIA, Santa Clara, California, us, 95053
Senior Design Engineer, Coherent High Speed Interconnect
NVIDIA is looking for a Senior Design Engineer for our Coherent High Speed Interconnect team.
Base pay range: $168,000.00/yr - $310,500.00/yr.
What You'll Be Doing
You will be working on architecture and design of our state‑of‑the‑art high‑speed coherent interconnects (NVLINK‑C2C) for our mobile SoCs and GPUs.
Collaborate with architects, external partners, software engineers, and circuit designers to deliver a class‑leading high‑speed coherent interconnect.
The NVLINK‑C2C enables the creation of a new class of integrated products with NVIDIA partners, built via chiplets, allowing NVIDIA GPUs, DPUs, and CPUs to be coherently interconnected with custom silicon.
This position offers the opportunity to have real impact in a dynamic, technology‑focused company impacting product lines ranging from consumer graphics to self‑driving cars and the growing field of artificial intelligence.
What We Need To See
BS or equivalent experience in Electrical Engineering or Computer Engineering or related degree required; advanced degrees (MS, PhD) a plus.
5+ years of relevant design experience.
Knowledge of industry standard interconnect protocols such as PCIe, CXL, AXI, CHI will be useful.
Understanding or experience with link‑layer stacks including data link layer and physical layer.
Experience with physical layer of interconnects such as memory (DDR, LPDDR, etc.), PCIe, SerDes.
Experience and knowledge in architecture, RTL design, performance analysis and power optimization.
Strong working knowledge of Verilog or SystemVerilog.
Good communication skills and interpersonal skills are required. A history of mentoring junior engineers and interns is a huge plus.
Location & Work Style Hybrid.
Benefits & Equity You will also be eligible for equity and benefits.
EEO Statement NVIDIA is committed to fostering a diverse work environment and is proud to be an equal opportunity employer. We do not discriminate on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.
Application Deadline Applications for this job will be accepted until September 6, 2025.
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Base pay range: $168,000.00/yr - $310,500.00/yr.
What You'll Be Doing
You will be working on architecture and design of our state‑of‑the‑art high‑speed coherent interconnects (NVLINK‑C2C) for our mobile SoCs and GPUs.
Collaborate with architects, external partners, software engineers, and circuit designers to deliver a class‑leading high‑speed coherent interconnect.
The NVLINK‑C2C enables the creation of a new class of integrated products with NVIDIA partners, built via chiplets, allowing NVIDIA GPUs, DPUs, and CPUs to be coherently interconnected with custom silicon.
This position offers the opportunity to have real impact in a dynamic, technology‑focused company impacting product lines ranging from consumer graphics to self‑driving cars and the growing field of artificial intelligence.
What We Need To See
BS or equivalent experience in Electrical Engineering or Computer Engineering or related degree required; advanced degrees (MS, PhD) a plus.
5+ years of relevant design experience.
Knowledge of industry standard interconnect protocols such as PCIe, CXL, AXI, CHI will be useful.
Understanding or experience with link‑layer stacks including data link layer and physical layer.
Experience with physical layer of interconnects such as memory (DDR, LPDDR, etc.), PCIe, SerDes.
Experience and knowledge in architecture, RTL design, performance analysis and power optimization.
Strong working knowledge of Verilog or SystemVerilog.
Good communication skills and interpersonal skills are required. A history of mentoring junior engineers and interns is a huge plus.
Location & Work Style Hybrid.
Benefits & Equity You will also be eligible for equity and benefits.
EEO Statement NVIDIA is committed to fostering a diverse work environment and is proud to be an equal opportunity employer. We do not discriminate on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.
Application Deadline Applications for this job will be accepted until September 6, 2025.
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