NVIDIA
Senior Memory Post Silicon Qualification Engineer
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Senior Memory Post Silicon Qualification Engineer
role at
NVIDIA .
NVIDIA is leading the way in groundbreaking developments in Artificial Intelligence, High-Performance Computing, and Visualization. Our invention, the GPU, serves as the visual cortex of modern computers and is at the heart of our products and services. Our work opens up new universes to explore, enables amazing creativity and discovery, and powers what were once science‑fiction inventions, from artificial intelligence to autonomous cars. NVIDIA is looking for phenomenal people like you to help us accelerate the next wave of artificial intelligence.
Working in NVIDIA's Silicon Solutions Engineering group, you will innovate and drive memory qualification on current and future Tegra/GPU silicon/products. You will collaborate with teams from logic design, circuit design, architects, PCB, and software engineering to ensure successful product development with aggressive product cycles. This position could potentially grow into a management role.
What You’ll Be Doing
Bring up a high‑speed memory interface on complex chips like GPUs and SoCs.
Perform functional validation, I/O tuning, and PVT testing of the memory controller and DRAM to support successful silicon productization.
Optimize memory I/O settings to support multiple memory configurations involving different types of DRAM and vendors.
Identify functional issues, conduct root‑cause analysis, and drive closure of issues found, coordinating with design, architecture, and board teams as required.
Collaborate with the pre‑Si team to understand new features and create appropriate validation test plans.
What We Need To See
B. Tech or M. Tech in Electronics Engineering or equivalent experience.
8+ years of experience in the semiconductor industry with a minimum of 2 years in memory interface validation.
Strong understanding of the protocol for DRAM types like GDDR/LPDDR.
Familiarity with HW lab environment and equipment such as DMM, oscilloscope, and thermal solutions.
Background in understanding PCB stack‑up, board layouts, power planes, and silicon‑integration guidelines.
Experience in writing lab automation scripts using C, Python, or Perl.
Strong interpersonal skills—self‑motivated and collaborative.
Base salary for this role is determined by location, experience, and comparable positions. The base salary range is $168,000 – $264,500 for Level 4 and $196,000 – $310,500 for Level 5.
Applicants will also be eligible for equity and benefits.
Applications for this job will be accepted until October 27, 2025.
NVIDIA is committed to fostering a diverse work environment and is an equal‑opportunity employer. Hiring decisions are made without regard to race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status, or any other characteristic protected by law.
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Senior Memory Post Silicon Qualification Engineer
role at
NVIDIA .
NVIDIA is leading the way in groundbreaking developments in Artificial Intelligence, High-Performance Computing, and Visualization. Our invention, the GPU, serves as the visual cortex of modern computers and is at the heart of our products and services. Our work opens up new universes to explore, enables amazing creativity and discovery, and powers what were once science‑fiction inventions, from artificial intelligence to autonomous cars. NVIDIA is looking for phenomenal people like you to help us accelerate the next wave of artificial intelligence.
Working in NVIDIA's Silicon Solutions Engineering group, you will innovate and drive memory qualification on current and future Tegra/GPU silicon/products. You will collaborate with teams from logic design, circuit design, architects, PCB, and software engineering to ensure successful product development with aggressive product cycles. This position could potentially grow into a management role.
What You’ll Be Doing
Bring up a high‑speed memory interface on complex chips like GPUs and SoCs.
Perform functional validation, I/O tuning, and PVT testing of the memory controller and DRAM to support successful silicon productization.
Optimize memory I/O settings to support multiple memory configurations involving different types of DRAM and vendors.
Identify functional issues, conduct root‑cause analysis, and drive closure of issues found, coordinating with design, architecture, and board teams as required.
Collaborate with the pre‑Si team to understand new features and create appropriate validation test plans.
What We Need To See
B. Tech or M. Tech in Electronics Engineering or equivalent experience.
8+ years of experience in the semiconductor industry with a minimum of 2 years in memory interface validation.
Strong understanding of the protocol for DRAM types like GDDR/LPDDR.
Familiarity with HW lab environment and equipment such as DMM, oscilloscope, and thermal solutions.
Background in understanding PCB stack‑up, board layouts, power planes, and silicon‑integration guidelines.
Experience in writing lab automation scripts using C, Python, or Perl.
Strong interpersonal skills—self‑motivated and collaborative.
Base salary for this role is determined by location, experience, and comparable positions. The base salary range is $168,000 – $264,500 for Level 4 and $196,000 – $310,500 for Level 5.
Applicants will also be eligible for equity and benefits.
Applications for this job will be accepted until October 27, 2025.
NVIDIA is committed to fostering a diverse work environment and is an equal‑opportunity employer. Hiring decisions are made without regard to race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status, or any other characteristic protected by law.
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