Cadence Design Systems, Inc.
PDK Enablement Engineering Specialist
Cadence Design Systems, Inc., San Jose, California, United States, 95199
Overview
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
PDK Enablement Engineering Specialist
Job Description Summary As a PDK enablement engineering specialist, you will provide and support the tools and foundry files to enable the circuit implementation teams who build circuits used in cars, cell phones, data centers, etc. using the latest fabrication technologies: finfet, gate all-around, and using the latest Cadence software tools, including AI.
Job Description Cadence Design Systems is seeking PDK enablement engineering specialists to enable foundry PDKs and support the growing analog design and custom layout team building IP using the Cadence design tools (Virtuoso, Pegasus, Quantus, etc.) to build high speed interfaces used in chips found in cars, cell phones, data centers, etc.
You will get the opportunity to collaborate with circuit implementation experts to contribute to the development of exciting chips, work with the best-in-class EDA tools and interact with the Cadence engineering team using developing those tools to improve those tools.
The PDKs installed cover the latest technologies offered from all leading edge foundries in gate all-around and finfet nodes, as well as 2D and 2.5D packaging as well as 3D IC stacking.
Responsibilities
The PDK enablement team is a part of the Cadence Design IP development group responsible for downloading, formatting, installing, QA and testing, releasing, and maintaining foundry data. We analyze initial PDKs and following versions to understand the impact of the design PDK, models, DRC, LVS and extraction rules and decks, reliability requirements on design and share this knowledge with the design teams. Examples of foundry data include physical verification decks, device models, extraction tech files, and Virtuoso PDKs. Those are the fundamental building blocks on which all the design teams rely to build their circuits.
We also create and use existing automation and regression routines to ease the installation and ensure the operation of collateral with various tool versions. The quality, accuracy and reliability of the PDK is critical to the efficiency and quality of the circuit design.
We customize the foundry collateral to improve the design team efficiency and the design quality.
The team interacts with the foundries about the PDK and foundry data, discussing novelties, issues, bugs, etc.
The team also interacts with Cadence R&D teams on tool development, based on PDK learnings.
Qualifications
BSEE, MSEE
Previous experience in PDK enablement
Knowledge of analog design and layout tools and flows
Exposure to Cadence Virtuoso Layout and physical verification tools is a plus
Team player, driven, self-motivated, innovative and autonomous
Attention to details
Excellent communication, presentation and customer service skills
Additional / Profil Profil recherché :
Diplôme en génie électrique ou électronique (BSEE ou MSEE)
Expérience en support CAD analogique (design, layout) ou en PDK
Excellente compréhension de la conception de circuits et du layout
La connaissance des outils de conception Cadence Composer Schematic et Virtuoso Layout et des outils de simulation et de vérification physique est un atout
Esprit d\'équipe, dynamisme, autonomie, esprit d\'innovation
Excellentes compétences en communication, présentation et service client
The annual salary range for British Columbia is 89,600 CAD to 166,400 CAD. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.
We’re doing work that matters. Help us solve what others can’t.
We welcome applications from candidates with disabilities and in equity seeking groups. If you have accessibility needs during the application and interview process, we encourage you to make your needs known.
Equal Employment Opportunity Policy:
Cadence is committed to equal employment opportunity throughout all levels of the organization.
Cadence is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.
Cadence is committed to creating a diverse environment and is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.
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PDK Enablement Engineering Specialist
Job Description Summary As a PDK enablement engineering specialist, you will provide and support the tools and foundry files to enable the circuit implementation teams who build circuits used in cars, cell phones, data centers, etc. using the latest fabrication technologies: finfet, gate all-around, and using the latest Cadence software tools, including AI.
Job Description Cadence Design Systems is seeking PDK enablement engineering specialists to enable foundry PDKs and support the growing analog design and custom layout team building IP using the Cadence design tools (Virtuoso, Pegasus, Quantus, etc.) to build high speed interfaces used in chips found in cars, cell phones, data centers, etc.
You will get the opportunity to collaborate with circuit implementation experts to contribute to the development of exciting chips, work with the best-in-class EDA tools and interact with the Cadence engineering team using developing those tools to improve those tools.
The PDKs installed cover the latest technologies offered from all leading edge foundries in gate all-around and finfet nodes, as well as 2D and 2.5D packaging as well as 3D IC stacking.
Responsibilities
The PDK enablement team is a part of the Cadence Design IP development group responsible for downloading, formatting, installing, QA and testing, releasing, and maintaining foundry data. We analyze initial PDKs and following versions to understand the impact of the design PDK, models, DRC, LVS and extraction rules and decks, reliability requirements on design and share this knowledge with the design teams. Examples of foundry data include physical verification decks, device models, extraction tech files, and Virtuoso PDKs. Those are the fundamental building blocks on which all the design teams rely to build their circuits.
We also create and use existing automation and regression routines to ease the installation and ensure the operation of collateral with various tool versions. The quality, accuracy and reliability of the PDK is critical to the efficiency and quality of the circuit design.
We customize the foundry collateral to improve the design team efficiency and the design quality.
The team interacts with the foundries about the PDK and foundry data, discussing novelties, issues, bugs, etc.
The team also interacts with Cadence R&D teams on tool development, based on PDK learnings.
Qualifications
BSEE, MSEE
Previous experience in PDK enablement
Knowledge of analog design and layout tools and flows
Exposure to Cadence Virtuoso Layout and physical verification tools is a plus
Team player, driven, self-motivated, innovative and autonomous
Attention to details
Excellent communication, presentation and customer service skills
Additional / Profil Profil recherché :
Diplôme en génie électrique ou électronique (BSEE ou MSEE)
Expérience en support CAD analogique (design, layout) ou en PDK
Excellente compréhension de la conception de circuits et du layout
La connaissance des outils de conception Cadence Composer Schematic et Virtuoso Layout et des outils de simulation et de vérification physique est un atout
Esprit d\'équipe, dynamisme, autonomie, esprit d\'innovation
Excellentes compétences en communication, présentation et service client
The annual salary range for British Columbia is 89,600 CAD to 166,400 CAD. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.
We’re doing work that matters. Help us solve what others can’t.
We welcome applications from candidates with disabilities and in equity seeking groups. If you have accessibility needs during the application and interview process, we encourage you to make your needs known.
Equal Employment Opportunity Policy:
Cadence is committed to equal employment opportunity throughout all levels of the organization.
Cadence is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.
Cadence is committed to creating a diverse environment and is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.
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