Voiceflow
Location
Burlingame, CA Employment Type
Full time Location Type
On-site Department
Satellite Compensation
$110K – $190K • Offers Equity
The final job level and salary will be determined based on a range of factors including the candidate’s education, qualifications, knowledge, skills, abilities, and relevant experience. The listed salary range is provided to offer insight into potential compensation, but it’s not a guarantee of the final offer. While we include the full range to be transparent, offers most often fall within the middle portion rather than the top. Xona is the navigational intelligence company bringing real-time, centimeter-level certainty to any device, anywhere on Earth. With Pulsar – the world’s most advanced PNT satellite infrastructure in Low Earth Orbit – Xona will offer a future-proof, backwards-compatible global positioning system optimized for absolute precision, superior power, and robust protection. We are seeking a mid-level
FPGA Engineer
to join our team working on high-reliability digital systems for space-based navigation payloads. In this role, you’ll contribute to the design, implementation, and testing of FPGA logic for real-time, mission-critical applications. You’ll work closely with hardware and systems teams to help bring our next-generation payloads from concept to flight. What You’ll Do
Develop, implement, and verify RTL designs for Xilinx FPGAs (e.g., RFSoC, Zynq Ultrascale+)
Build and maintain digital processing pipelines, control logic, and data interfaces
Support hardware bring-up and system integration on custom satellite payloads
Design for fault tolerance and space reliability, including SEU mitigation and system monitoring
Collaborate with systems, hardware, and software engineers to define and validate FPGA requirements
Participate in lab testing, simulation, and design reviews
Document designs, test plans, and development processes in a structured, reviewable format
Desired Qualifications
Experience working with Xilinx Zynq or RFSoC devices
Exposure to space system development, including SEU mitigation techniques and fault-tolerant design
Familiarity with high-speed interfaces, memory controllers, or custom peripheral integration
Scripting experience (e.g., Python or TCL) for automating test and build processes
Experience collaborating on multi-disciplinary hardware/software projects
Understanding of space qualification and hardware validation processes is a plus
Requirements
Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field
3–5 years of professional FPGA design experience using Verilog, VHDL, or SystemVerilog
Strong experience with FPGA development flows, including Vivado or similar tools
Proficiency in simulation, verification, and hardware debugging techniques
Familiarity with on-chip interfaces such as AXI, AXI-Stream, and clock domain crossing
Hands-on experience bringing up FPGA designs in a lab environment
Comfortable working in a Linux development environment with version control tools like Git
Must be able to work full-time onsite in Burlingame, California
For U.S. Roles:
To comply with U.S. Government space technology export regulations, applicant must be a U.S. citizen, lawful permanent resident of the United States (i.e. Green Card holder), or other protected individual as defined by 8 U.S.C. 1324b(a)(3). For U.K. Roles:
To comply with U.K. regulations, this role requires Baseline Personnel Security Standard (BPSS) checks, and successful candidates must be eligible to obtain UK Security Clearance (SC). For Canada Roles:
Successful candidates must obtain and hold a security clearance at the reliability status level, and pass security assessment for the Canadian Controlled Goods Program (CGP) and ITAR. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or veteran status. Compensation Range: $110K - $190K
#J-18808-Ljbffr
Burlingame, CA Employment Type
Full time Location Type
On-site Department
Satellite Compensation
$110K – $190K • Offers Equity
The final job level and salary will be determined based on a range of factors including the candidate’s education, qualifications, knowledge, skills, abilities, and relevant experience. The listed salary range is provided to offer insight into potential compensation, but it’s not a guarantee of the final offer. While we include the full range to be transparent, offers most often fall within the middle portion rather than the top. Xona is the navigational intelligence company bringing real-time, centimeter-level certainty to any device, anywhere on Earth. With Pulsar – the world’s most advanced PNT satellite infrastructure in Low Earth Orbit – Xona will offer a future-proof, backwards-compatible global positioning system optimized for absolute precision, superior power, and robust protection. We are seeking a mid-level
FPGA Engineer
to join our team working on high-reliability digital systems for space-based navigation payloads. In this role, you’ll contribute to the design, implementation, and testing of FPGA logic for real-time, mission-critical applications. You’ll work closely with hardware and systems teams to help bring our next-generation payloads from concept to flight. What You’ll Do
Develop, implement, and verify RTL designs for Xilinx FPGAs (e.g., RFSoC, Zynq Ultrascale+)
Build and maintain digital processing pipelines, control logic, and data interfaces
Support hardware bring-up and system integration on custom satellite payloads
Design for fault tolerance and space reliability, including SEU mitigation and system monitoring
Collaborate with systems, hardware, and software engineers to define and validate FPGA requirements
Participate in lab testing, simulation, and design reviews
Document designs, test plans, and development processes in a structured, reviewable format
Desired Qualifications
Experience working with Xilinx Zynq or RFSoC devices
Exposure to space system development, including SEU mitigation techniques and fault-tolerant design
Familiarity with high-speed interfaces, memory controllers, or custom peripheral integration
Scripting experience (e.g., Python or TCL) for automating test and build processes
Experience collaborating on multi-disciplinary hardware/software projects
Understanding of space qualification and hardware validation processes is a plus
Requirements
Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field
3–5 years of professional FPGA design experience using Verilog, VHDL, or SystemVerilog
Strong experience with FPGA development flows, including Vivado or similar tools
Proficiency in simulation, verification, and hardware debugging techniques
Familiarity with on-chip interfaces such as AXI, AXI-Stream, and clock domain crossing
Hands-on experience bringing up FPGA designs in a lab environment
Comfortable working in a Linux development environment with version control tools like Git
Must be able to work full-time onsite in Burlingame, California
For U.S. Roles:
To comply with U.S. Government space technology export regulations, applicant must be a U.S. citizen, lawful permanent resident of the United States (i.e. Green Card holder), or other protected individual as defined by 8 U.S.C. 1324b(a)(3). For U.K. Roles:
To comply with U.K. regulations, this role requires Baseline Personnel Security Standard (BPSS) checks, and successful candidates must be eligible to obtain UK Security Clearance (SC). For Canada Roles:
Successful candidates must obtain and hold a security clearance at the reliability status level, and pass security assessment for the Canadian Controlled Goods Program (CGP) and ITAR. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or veteran status. Compensation Range: $110K - $190K
#J-18808-Ljbffr