AMD
SERDES Analog Mixed Signal Circuit Design Engineer
AMD, San Jose, California, United States, 95199
SERDES Analog Mixed Signal Circuit Design Engineer
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SERDES Analog Mixed Signal Circuit Design Engineer
role at
AMD .
Base pay range: $159,840.00/yr - $239,760.00/yr.
AMD's Serdes Technology Group develops high-performance, multi-protocol wireline transceivers in state-of-the-art CMOS process. We are currently seeking an analog/mixed-signal design engineer to join our world-class team.
The Person The candidate will be responsible for the design of high-speed ADC-based receivers, DAC-based transmitters, or silicon photonics transceivers.
Key Responsibilities
Define circuit architectures optimized for high bandwidth electrical and optical links.
Perform link‑level simulation in Matlab and/or SPICE to prove the architecture.
Perform design and modeling of on-die RF passive components (e.g., inductors and capacitors) and/or optical structures.
Design circuit components (e.g., DAC, SAR-ADC, S/H, Analog Front-End, PLL, reference generation, clock distribution) required to implement the architecture in advanced FinFET process.
Preferred Experience
Strong background in analog and mixed-signal circuit design.
Strong teamwork and communication skills.
History of coming up with innovative circuit design/architecture is a plus.
Academic Credentials
BS or MS or PhD in Electrical Engineering or Computer Engineering or related equivalent.
Location San Jose, CA.
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
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SERDES Analog Mixed Signal Circuit Design Engineer
role at
AMD .
Base pay range: $159,840.00/yr - $239,760.00/yr.
AMD's Serdes Technology Group develops high-performance, multi-protocol wireline transceivers in state-of-the-art CMOS process. We are currently seeking an analog/mixed-signal design engineer to join our world-class team.
The Person The candidate will be responsible for the design of high-speed ADC-based receivers, DAC-based transmitters, or silicon photonics transceivers.
Key Responsibilities
Define circuit architectures optimized for high bandwidth electrical and optical links.
Perform link‑level simulation in Matlab and/or SPICE to prove the architecture.
Perform design and modeling of on-die RF passive components (e.g., inductors and capacitors) and/or optical structures.
Design circuit components (e.g., DAC, SAR-ADC, S/H, Analog Front-End, PLL, reference generation, clock distribution) required to implement the architecture in advanced FinFET process.
Preferred Experience
Strong background in analog and mixed-signal circuit design.
Strong teamwork and communication skills.
History of coming up with innovative circuit design/architecture is a plus.
Academic Credentials
BS or MS or PhD in Electrical Engineering or Computer Engineering or related equivalent.
Location San Jose, CA.
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
#J-18808-Ljbffr