Logo
Retym, Inc

CAD Engineer (Graduate)

Retym, Inc, Austin, Texas, us, 78716

Save Job

Join to apply for the

CAD Engineer (Graduate)

role at

Retym, Inc .

Get AI-powered advice on this job and more exclusive features.

About The Position Retym is a leading technology company specializing in ASIC design and development. We are looking for a CAD Engineer (Graduate) to join our team. As a CAD Engineer, you will contribute to developing, maintaining, and automating the design infrastructure. This is a hands‑on position for someone passionate about scripting, contributing to innovative projects and advancing their career in EDA design and automation.

Responsibilities

Develop and maintain CAD automation scripts and utilities using Python, SKILL, and shell scripting.

Support integration of EDA tools (e.g. Cadence, Synopsys, Siemens) into design flows.

Support VLSI automation flows.

Participate in maintaining and optimizing Linux-based project environments.

Provide first‑line CAD support to Analog, Layout, and VLSI engineers.

Collaborate closely with the CAD lead while maintaining ownership of assigned tasks.

Assist in managing environment setup, tool versions, and license configurations.

Troubleshoot tool and flow infrastructure issues.

Contribute to internal documentation, version control systems, and workflow improvements.

Requirements

Background in Computer Science, Electrical Engineering, or Computer Engineering.

1‑3 years of experience.

Solid scripting and programming skills in Python or Perl, and shell scripting.

Proficient in at least one compiled language (C, C++ or Java).

Comfortable and efficient working in Linux/Unix environments.

Familiar with version control systems (Git, SOS).

Strong analytical and troubleshooting skills.

Team player with good communication and self‑learning abilities.

Nice to Have

Experience with Cadence Virtuoso, Spectre, extraction tools (StarRC, EMX).

Experience with cloud compute infrastructure (AWS, Azure).

Exposure to job schedulers, license servers, or CI/CD environments.

Understanding of analog design flow or PDK structure.

Good knowledge of the VLSI design stages.

Knowledge of layout verification tools.

#J-18808-Ljbffr