Intel Corporation
Do Something Wonderful!
Intel put Silicon in Silicon Valley. No one else is obsessed with engineering and has a brighter future. Every day we create world‑changing technology that enriches the lives of every person on earth. So, if you have a big idea, let’s do something wonderful together. Join us, because at Intel, we are building a better tomorrow.
Job Details Intel is looking for a skilled engineer to join a high‑performing team specializing in clocking architecture, clock distribution network design, custom clock circuits, clock tree synthesis, and low power design for Intel’s flagship IA cores in the most advanced process nodes.
Who We Are We are a team of professionals dedicated to pushing the limits of CPU design. You will work closely with logic, circuit, architecture, and design automation teams to deliver cutting‑edge processor technology.
Responsibilities
Perform physical design implementation of custom CPU designs from RTL to GDS to create a design database ready for manufacturing.
Conduct all aspects of the CPU physical design flow, including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power/clock distribution, reliability, and power and noise analysis.
Conduct verification and sign‑off, including formal equivalence verification, static timing analysis, reliability verification, static and dynamic power integrity, layout verification, electrical rule checking, and structural design checking.
Analyze results and make recommendations to improve current and future CPU microarchitectures, collaborating closely with logic, circuit, architecture, and design automation teams.
Possess CPU‑specific expertise in physical clock design, timing closure, coverage analysis, multiple power domain analysis, structured placement, routing, synthesis, and DFT.
Work intimately with industry EDA vendors to build and enhance tool capabilities for designing a high‑speed, low‑power synthesizable CPU.
Optimize CPU design to improve product‑level parameters such as power, frequency, and area.
Participate in the development and improvement of physical design methodologies and flow automation.
Maintain a strong understanding of static timing analysis, clock‑related timing parameters, EM, IR, and the overall place‑and‑route flow.
Understand sub‑micron process technology and circuits.
Exhibit excellent written and communication skills, working well independently and developing quick engineering solutions for complex problems.
Interface effectively with engineers and managers, providing schedule updates and managing priorities.
Demonstrate high problem‑solving skills, tolerance for ambiguity, and a focus on quality, discipline, and accurate results for engineering customers.
Contribute and work well in a multi‑site team setting.
Qualifications You must possess the minimum education requirements and minimum required qualifications to be initially considered for this position. Relevant experience can be obtained through schoolwork, classes, project work, internships, and/or military experience. Additional preferred qualifications are considered a plus factor in identifying top candidates.
Minimum Qualifications
The ideal candidate must have a Master’s Degree in Electrical Engineering, Computer Engineering, or a related STEM field, with 3+ years of experience in backend design and/or integration on leading‑edge process nodes.
Experience with Perl, TCL, or other industry‑standard scripting languages.
High‑frequency clock distribution design and implementation, custom circuits, and clock tree synthesis.
Preferred Qualifications
Experience with computer architecture.
Experience with IA‑32 assembly and/or Verilog programming.
Experience with validation or testing, especially in a silicon design team.
Job Type Experienced Hire
Shift Shift 1 (United States of America)
Primary Location US, Texas, Austin
Additional Locations US, Oregon, Hillsboro
Business Group The Silicon Engineering Group (SIG) is a worldwide organization focused on the development and integration of SOCs, cores, and critical IP from architecture to manufacturing readiness. This business group leverages an incomparable mix of experts with different backgrounds to unleash innovative computing experiences.
Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Benefits We offer a total compensation package that ranks among the best in the industry. It includes competitive pay, stock, bonuses, and benefits such as health, retirement, and vacation. Annual Salary Range (US): $139,710.00 – $262,680.00 USD.
Work Model for this Role This role will require an on‑site presence. Job posting details (such as work model, location or time type) are subject to change.
Referrals increase your chances of interviewing at Intel Corporation by 2x.
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Intel put Silicon in Silicon Valley. No one else is obsessed with engineering and has a brighter future. Every day we create world‑changing technology that enriches the lives of every person on earth. So, if you have a big idea, let’s do something wonderful together. Join us, because at Intel, we are building a better tomorrow.
Job Details Intel is looking for a skilled engineer to join a high‑performing team specializing in clocking architecture, clock distribution network design, custom clock circuits, clock tree synthesis, and low power design for Intel’s flagship IA cores in the most advanced process nodes.
Who We Are We are a team of professionals dedicated to pushing the limits of CPU design. You will work closely with logic, circuit, architecture, and design automation teams to deliver cutting‑edge processor technology.
Responsibilities
Perform physical design implementation of custom CPU designs from RTL to GDS to create a design database ready for manufacturing.
Conduct all aspects of the CPU physical design flow, including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power/clock distribution, reliability, and power and noise analysis.
Conduct verification and sign‑off, including formal equivalence verification, static timing analysis, reliability verification, static and dynamic power integrity, layout verification, electrical rule checking, and structural design checking.
Analyze results and make recommendations to improve current and future CPU microarchitectures, collaborating closely with logic, circuit, architecture, and design automation teams.
Possess CPU‑specific expertise in physical clock design, timing closure, coverage analysis, multiple power domain analysis, structured placement, routing, synthesis, and DFT.
Work intimately with industry EDA vendors to build and enhance tool capabilities for designing a high‑speed, low‑power synthesizable CPU.
Optimize CPU design to improve product‑level parameters such as power, frequency, and area.
Participate in the development and improvement of physical design methodologies and flow automation.
Maintain a strong understanding of static timing analysis, clock‑related timing parameters, EM, IR, and the overall place‑and‑route flow.
Understand sub‑micron process technology and circuits.
Exhibit excellent written and communication skills, working well independently and developing quick engineering solutions for complex problems.
Interface effectively with engineers and managers, providing schedule updates and managing priorities.
Demonstrate high problem‑solving skills, tolerance for ambiguity, and a focus on quality, discipline, and accurate results for engineering customers.
Contribute and work well in a multi‑site team setting.
Qualifications You must possess the minimum education requirements and minimum required qualifications to be initially considered for this position. Relevant experience can be obtained through schoolwork, classes, project work, internships, and/or military experience. Additional preferred qualifications are considered a plus factor in identifying top candidates.
Minimum Qualifications
The ideal candidate must have a Master’s Degree in Electrical Engineering, Computer Engineering, or a related STEM field, with 3+ years of experience in backend design and/or integration on leading‑edge process nodes.
Experience with Perl, TCL, or other industry‑standard scripting languages.
High‑frequency clock distribution design and implementation, custom circuits, and clock tree synthesis.
Preferred Qualifications
Experience with computer architecture.
Experience with IA‑32 assembly and/or Verilog programming.
Experience with validation or testing, especially in a silicon design team.
Job Type Experienced Hire
Shift Shift 1 (United States of America)
Primary Location US, Texas, Austin
Additional Locations US, Oregon, Hillsboro
Business Group The Silicon Engineering Group (SIG) is a worldwide organization focused on the development and integration of SOCs, cores, and critical IP from architecture to manufacturing readiness. This business group leverages an incomparable mix of experts with different backgrounds to unleash innovative computing experiences.
Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Benefits We offer a total compensation package that ranks among the best in the industry. It includes competitive pay, stock, bonuses, and benefits such as health, retirement, and vacation. Annual Salary Range (US): $139,710.00 – $262,680.00 USD.
Work Model for this Role This role will require an on‑site presence. Job posting details (such as work model, location or time type) are subject to change.
Referrals increase your chances of interviewing at Intel Corporation by 2x.
#J-18808-Ljbffr