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AMD

System Validation Architect

AMD, Secaucus, New Jersey, us, 07094

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System Validation Architect

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AMD

Location: Secaucus, NJ

Base pay range: $114,640.00/yr - $171,960.00/yr

This range is provided by AMD. Your actual pay will be based on your skills and experience — talk with your recruiter to learn more.

At AMD, our mission is to build great products that accelerate next‑generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.

The Role We are seeking a collaborative and motivated Systems Test Engineer to join our team. In this role, you will develop and execute methodologies and test content for system‑level hardware, firmware and software validation on machine learning systems built with AMD’s technologies. You’ll work closely with architecture, design, and post‑silicon teams to identify and resolve complex systems, improving future debug and test features. This position involves developing automation, refining validation processes, executing test cases, analyzing data and driving system‑level quality across AMD’s product portfolio. We welcome applicants from diverse backgrounds who bring curiosity, technical depth, and a commitment to innovation.

Key Responsibilities

Create and execute test procedures to validate the design of various system components on the next generation of machine learning architectures, including all components of servers such as CPU, GPU, memory, BIOS, BMC, IO, storage, and networking.

Translate system specs into a robust system integration test plan.

Make improvements to system‑level integration test strategies, methodologies, and processes.

Collaborate with multi‑functional HW and SW teams to debug and tackle complex issues.

Develop and improve automation features according to requirements.

Monitor and analyze the execution of automated tests at scale (for hundreds or thousands of systems).

Preferred Experience

Post‑silicon system integration and system testing.

Debugging skills at SoC (System on a Chip) and system level.

Ability to validate at cluster‑level (scale‑up and scale‑out).

Experience with computer architecture concepts and silicon features.

Prior experience working on servers.

Ability to program in Python is a must; other languages are a bonus.

Excellent knowledge of current machine learning technologies in the data center.

Effective communication skills, including influencing and working across large multi‑functional HW, SW, and architecture teams.

Academic Credentials

Bachelor’s or Master’s degree in Computer Science, Computer Engineering, Electrical Engineering, or equivalent.

Benefits offered are described: AMD benefits at a glance.

Seniority Level Mid‑Senior level

Employment Type Full‑time

Industries Semiconductor Manufacturing

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EEO Statement AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee‑based recruitment services. AMD and its subsidiaries are equal‑opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third‑party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

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