Verification Engineer - PCIe/CXL, SV/UVM Onsite

A leading staffing and IT solutions firm is seeking a Verification Engineer in Longmont, CO. This role focuses on design and functional verification of IP blocks using SystemVerilog and UVM methodologies. Candidates should have a minimum of 3 years of experience in SystemVerilog verification and possess strong skills in simulators and ASIC/FPGA concepts. This is a 100% onsite position offering competitive pay. #J-18808-Ljbffr