Lead Packet Processing Architect for High-Throughput ASICs

A leading innovation firm is seeking a Packet Processor Architect to design high-performance packet processing hardware. This role requires over 15 years of experience in networking ASIC architecture, with responsibilities including leading design validation and developing scalable packet processing pipelines. The position is onsite in Saratoga, CA, with a competitive salary range of $280,000 to $300,000 annually and comprehensive benefits. #J-18808-Ljbffr