Senior SerDes IC Design Engineer - High-Speed Analog

A leading technology firm in San Jose is looking for a Principal Design Engineer specializing in SerDes design. The role requires at least 7 years of experience in CMOS SerDes or high-speed I/O IC design and development. Responsibilities include designing and verifying analog/mixed signal IC circuit blocks. The position offers a competitive salary ranging from $136,500 to $253,500 annually along with various benefits such as paid vacations and 401(k) plan. A strong knowledge of signal equalization techniques and CAD tools is essential. #J-18808-Ljbffr