Senior CMOS RFIC Design Engineer – LNA/PA/PLL, Travel

A leading semiconductor company in San Jose is seeking an experienced engineer specialized in CMOS RFIC design. Responsibilities include designing, simulating, and verifying RFICs while collaborating with a cross-functional team. Ideal candidates will have a Master's degree in Electrical Engineering and over 5 years of experience with mobile handset designs. The company offers a competitive salary and comprehensive benefits package, providing exciting opportunities for career growth. #J-18808-Ljbffr