Logo
Insight Global

Hardware Design Engineer

Insight Global, Agoura Hills, California, United States, 91375

Save Job

Hardware Design Engineer

We’re looking for a Hardware Design Engineer to join our Digital Instrumentation team in Agoura Hills, CA to focus on the development of hardware products within the System Level Test division. We’re building a team and recruiting for three levels — junior, senior, and manager — depending on years of experience and leadership background. The successful candidate for this challenging position will design cutting edge electronic hardware used to test integrated circuits in test systems around the world. While the position is principally an electronic hardware designer, the engineer will gain experience with all aspects of modern complex system development in a collaborative environment. These aspects include hardware, software, and logic design; design for test and manufacturability; thermal management; mechanical engineering; requirements development and management; and other engineering disciplines.

Responsibilities

This position will be involved in all aspects of instrument design from concept, prototyping, simulation, schematic and layout, verification, documentation, and release to manufacturing

High level of proficiency designing complex circuits with digital, and power

Ability to interface productively with large and diverse cross functional teams (within all engineering disciplines: SW, FPGA, Mechanical, QA, Factory Applications, etc., and also outside engineering: Marketing, PMO, NPI, etc.)

Leading subproject teams through development cycles

Ability to lead engineering teams/sub‑teams through structured decision making

Excellent communication skills at all levels of abstraction (from detailed circuit analysis with other engineers, to high level product design approaches to senior leadership)

Required Skills & Experience

Educational background: BSEE or MSEE

Experience: 6+ years in relevant hardware engineering

Analogue/mixed-signal design with high-speed serial links

Tx/Rx equalization techniques (de-emphasis, CTLE, DFE)

Lab testing of high-speed serial links

Cadence/Allegro experience for schematic capture, PCB layout, and SI/PI analysis

Multi-layer PCB design experience for complex designs and high current density

Experience with new product development and taking designs from concept to high-volume production

Seniority Level

Junior

Senior

Manager

Employment Type

Full-time

Job Function

Design

Industries

Semiconductor Manufacturing

Base pay range: $145,000–$200,000 per year

#J-18808-Ljbffr