Intel
Job Details
Intel's Silicon Engineering Group seeks a Senior CPU Core Physical Design Engineer to lead the physical implementation of cutting‑edge processor designs from RTL to manufacturing‑ready GDS. This role requires deep expertise in advanced physical design methodologies and CPU‑specific design challenges to deliver world‑class, high‑performance, low‑power processors that power Intel's industry‑leading products.
Key Responsibilities Physical Design Implementation
Execute complete physical design flow for custom CPU designs from RTL to GDS, creating manufacturing‑ready design databases
Perform synthesis, place and route, clock tree synthesis, floorplanning, and power/clock distribution for complex designs
CPU Cores
Conduct static timing analysis, reliability analysis, and power/noise analysis for high‑performance processor designs
Optimize CPU designs to improve critical product parameters including power, frequency, and area
Verification & Signoff
Execute comprehensive verification and signoff processes including formal equivalence verification and static timing analysis
Perform reliability verification, static and dynamic power integrity analysis, and layout verification
Conduct electrical rule checking (ERC) and structural design checking to ensure manufacturing compliance
Ensure design quality and manufacturability across all verification domains
CPU‑Specific Expertise & Optimization
Apply specialized knowledge in CPU structural and physical design including physical clock design and timing closure
Perform coverage analysis, multiple power domain analysis, structured placement, and routing optimization
Implement design‑for‑test (DFT) methodologies specific to CPU architectures
Collaborate closely with logic, circuit, architecture, and design automation teams to optimize microarchitectures
Technology Leadership & Innovation
Work with industry EDA vendors to build and enhance tool capabilities for high‑speed, low‑power synthesizable CPU design
Analyze design results and provide recommendations to improve current and future CPU microarchitectures
Participate in development and improvement of physical design methodologies and flow automation
Drive adoption of advanced design techniques and emerging technologies
Qualifications Minimum Qualifications
Bachelor's degree in Computer Engineering, Computer Science, Electrical Engineering, or STEM‑related field of study
5+ years of experience in VLSI circuit design and synthesis
4+ years of experience in static timing analysis
4+ years of experience in low‑power design methodologies
Experience with physical design EDA tools (Synopsys, Cadence, Mentor Graphics)
Experience with timing closure, power optimization, and signal integrity analysis
Preferred Qualifications
Postgraduate degree (Master's/PhD) in Computer Engineering, Computer Science, Electrical Engineering, or STEM‑related field of study
Experience with x86 CPU architecture and Intel processor designs
Experience with Tcl, Perl, Python programming
Experience in CPU microarchitecture and high‑performance design principles
What We Offer
Competitive compensation and comprehensive benefits
Opportunity to work on industry‑leading CPU architectures and technologies
Access to cutting‑edge EDA tools and advanced process technologies
Collaboration with world‑class CPU architects and design engineers
Professional development and career advancement opportunities
Direct impact on products powering global computing infrastructure
Job Type Experienced Hire Shift: 1 (United States of America) Primary Location: Folsom, California, USA
Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://intel.wd1.myworkdayjobs.com/External/page/1025c144664a100150b4b1665c750003
Annual Salary Range 139,710.00 USD - 262,680.00 USD (United States)
Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on‑site at their assigned Intel site and off‑site. Job posting details (such as work model, location or time type) are subject to change.
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Key Responsibilities Physical Design Implementation
Execute complete physical design flow for custom CPU designs from RTL to GDS, creating manufacturing‑ready design databases
Perform synthesis, place and route, clock tree synthesis, floorplanning, and power/clock distribution for complex designs
CPU Cores
Conduct static timing analysis, reliability analysis, and power/noise analysis for high‑performance processor designs
Optimize CPU designs to improve critical product parameters including power, frequency, and area
Verification & Signoff
Execute comprehensive verification and signoff processes including formal equivalence verification and static timing analysis
Perform reliability verification, static and dynamic power integrity analysis, and layout verification
Conduct electrical rule checking (ERC) and structural design checking to ensure manufacturing compliance
Ensure design quality and manufacturability across all verification domains
CPU‑Specific Expertise & Optimization
Apply specialized knowledge in CPU structural and physical design including physical clock design and timing closure
Perform coverage analysis, multiple power domain analysis, structured placement, and routing optimization
Implement design‑for‑test (DFT) methodologies specific to CPU architectures
Collaborate closely with logic, circuit, architecture, and design automation teams to optimize microarchitectures
Technology Leadership & Innovation
Work with industry EDA vendors to build and enhance tool capabilities for high‑speed, low‑power synthesizable CPU design
Analyze design results and provide recommendations to improve current and future CPU microarchitectures
Participate in development and improvement of physical design methodologies and flow automation
Drive adoption of advanced design techniques and emerging technologies
Qualifications Minimum Qualifications
Bachelor's degree in Computer Engineering, Computer Science, Electrical Engineering, or STEM‑related field of study
5+ years of experience in VLSI circuit design and synthesis
4+ years of experience in static timing analysis
4+ years of experience in low‑power design methodologies
Experience with physical design EDA tools (Synopsys, Cadence, Mentor Graphics)
Experience with timing closure, power optimization, and signal integrity analysis
Preferred Qualifications
Postgraduate degree (Master's/PhD) in Computer Engineering, Computer Science, Electrical Engineering, or STEM‑related field of study
Experience with x86 CPU architecture and Intel processor designs
Experience with Tcl, Perl, Python programming
Experience in CPU microarchitecture and high‑performance design principles
What We Offer
Competitive compensation and comprehensive benefits
Opportunity to work on industry‑leading CPU architectures and technologies
Access to cutting‑edge EDA tools and advanced process technologies
Collaboration with world‑class CPU architects and design engineers
Professional development and career advancement opportunities
Direct impact on products powering global computing infrastructure
Job Type Experienced Hire Shift: 1 (United States of America) Primary Location: Folsom, California, USA
Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://intel.wd1.myworkdayjobs.com/External/page/1025c144664a100150b4b1665c750003
Annual Salary Range 139,710.00 USD - 262,680.00 USD (United States)
Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on‑site at their assigned Intel site and off‑site. Job posting details (such as work model, location or time type) are subject to change.
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