Principal SOC Verification Engineer for AI Accelerators

A semiconductor technology leader is looking for a Principal Engineer in SOC Design Verification to join their team in San Jose. This role involves defining verification strategies and managing verification processes for AI accelerators. Candidates should have a strong background in UVM and experience with ASIC verification, along with excellent communication skills. The position offers a competitive salary range and a comprehensive benefits package, including health insurance and wellness programs. #J-18808-Ljbffr