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Qualcomm

Senior Design Verification Engineer

Qualcomm, Santa Clara, California, us, 95053

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Senior Design Verification Engineer – Qualcomm Company : Qualcomm Atheros, Inc.

Job Area : Engineering Group > ASICS Engineering

General Summary : As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next‑generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all. As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance, high quality, low power world‑class products. Qualcomm Engineers collaborate with cross‑functional groups to determine product execution path.

Job Responsibilities

Own block level verification for wireless connectivity designs and meet coverage goals

Own the test‑bench, coding guidelines, best practices and enable reuse of block level UVM test‑benches at chip level

Come up with a comprehensive verification strategy encompassing simulations, formal verification, HW/SW reuse and simulation performance

Work with cross functional IP teams for integration verification

Work with design team to understand Spec and create comprehensive test plan for quality verification

Required Skill Sets

2+ years ASIC design, verification, or related work experience

Experience in UVM, SystemVerilog, SOC/Subsystem/IP DV, debugging and problem solving

Preferred Qualifications

3+ years of ASIC Verification experience

2+ years of working experience in UVM

Experience with scripting languages

Experience with building at least one test bench using UVM from scratch

Good amount of experience in Digital Logic design techniques, SoC architecture, including ARM CPUs, communications peripherals, multi‑domain clocking, power management, AMBA bus protocols such as AHB and AXI

Knowledge of low power, processor verification and GLS flows is a plus point

Experience with testbench automation, industry standard bug tracking, and regression mechanisms, code and functional coverage‑driven verification closure and ability to set up and deploy verification strategies based on directed testing, randomization, assertions, and architectural performance testing to achieve coverage

Strong problem solving skills

Strong team player and communicator

Minimum Qualifications

Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience

OR Master’s degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience

OR PhD in Science, Engineering, or related field

EEO Employer Statement Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.

Pay Range And Other Compensation & Benefits $126,700.00 – $190,100.00

In addition to a competitive annual discretionary bonus program and the opportunity for annual RSU grants, Qualcomm offers a highly competitive benefits package designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer – and you can review more details about our US benefits at this link.

If you would like more information about this role, please contact Qualcomm Careers.

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