Intel Corporation
Job Details
Intel Central Engineering Group is engaged with customers today starting with our existing foundry offerings. We are expanding at a torrid pace to include our most advanced technologies, which are ideal for high-performance applications, and they are completely dedicated to the success of our customers with full profit and loss responsibilities. Our focus is to ensure the successful integration and adoption of Intel technologies by OEMs, ODMs, and design partners. This team serves as a critical technical interface, acting as the "voice of the customer" within Intel to drive product improvements and resolve issues throughout the entire product lifecycle.
Responsibilities
Perform physical design implementation of custom IP and SoC designs from RTL to GDS to create a design database ready for manufacturing.
Conduct all aspects of the physical design flow including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power/clock distribution, reliability, and power and noise analysis.
Carry out verification and sign‑off, including formal equivalence verification, static timing analysis, reliability verification, static and dynamic power integrity, layout verification, electrical rule checking, and structural design checking.
Analyze results and recommend fixes for current and future product architecture.
Possess expertise in structural and physical design, including physical clock design, timing closure, coverage analysis, multiple power domain analysis, placing, routing, synthesis, and DFT using industry‑standard EDA tools.
Optimize design to improve product‑level parameters such as power, frequency, and area.
Participate in the development and improvement of physical design methodologies and flow automation.
Minimum Qualifications
Bachelor's degree in Electrical / Computer Engineering, Computer Science, or a STEM related field.
5+ years of experience with complex ASIC/SoC implementation.
Experience in system and processor architecture.
Experience designing and implementing complex blocks like CPUs, GPUs, media blocks, and memory controllers.
Experience with System Verilog/SOC development environments.
Experience with scripting languages (PERL, TCL, or Python).
Experience with hardware validation techniques (formal verification, test and function verification).
Preferred Qualifications
Post‑graduate degree in Electrical / Computer Engineering, Computer Science, or a STEM related field.
Experience with industry‑standard protocols (PCIE, USB, DDR, etc.).
Experience with interaction between computer hardware and software.
Experience with low‑power/UPF implementation/verification techniques.
Experience with formal verification techniques.
Job Type Experienced Hire
Shift Shift 1 (United States of America)
Primary Location US, Texas, Austin
Additional Locations US, California, Santa Clara; US, Oregon, Hillsboro
Business Group Intel invents at the boundaries of technology to make amazing experiences possible for business and society. We harness the cloud, IoT, memory, programmable solutions, and 5G to disrupt industries and solve global challenges. Leading on policy, diversity, inclusion, education, and sustainability, we create value for shareholders, customers, and society.
Equal Employment Opportunity All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Benefits We offer a total compensation package that ranks among the best in the industry. It includes competitive pay, stock, bonuses, as well as benefits programs such as health, retirement, and vacation.
Learn more about all of our benefits .
Annual Salary Range USD 139,710.00 – 262,680.00 (US locations)
Work Model This role will require an on‑site presence. Note that posting details such as work model, location, or time type are subject to change.
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Responsibilities
Perform physical design implementation of custom IP and SoC designs from RTL to GDS to create a design database ready for manufacturing.
Conduct all aspects of the physical design flow including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power/clock distribution, reliability, and power and noise analysis.
Carry out verification and sign‑off, including formal equivalence verification, static timing analysis, reliability verification, static and dynamic power integrity, layout verification, electrical rule checking, and structural design checking.
Analyze results and recommend fixes for current and future product architecture.
Possess expertise in structural and physical design, including physical clock design, timing closure, coverage analysis, multiple power domain analysis, placing, routing, synthesis, and DFT using industry‑standard EDA tools.
Optimize design to improve product‑level parameters such as power, frequency, and area.
Participate in the development and improvement of physical design methodologies and flow automation.
Minimum Qualifications
Bachelor's degree in Electrical / Computer Engineering, Computer Science, or a STEM related field.
5+ years of experience with complex ASIC/SoC implementation.
Experience in system and processor architecture.
Experience designing and implementing complex blocks like CPUs, GPUs, media blocks, and memory controllers.
Experience with System Verilog/SOC development environments.
Experience with scripting languages (PERL, TCL, or Python).
Experience with hardware validation techniques (formal verification, test and function verification).
Preferred Qualifications
Post‑graduate degree in Electrical / Computer Engineering, Computer Science, or a STEM related field.
Experience with industry‑standard protocols (PCIE, USB, DDR, etc.).
Experience with interaction between computer hardware and software.
Experience with low‑power/UPF implementation/verification techniques.
Experience with formal verification techniques.
Job Type Experienced Hire
Shift Shift 1 (United States of America)
Primary Location US, Texas, Austin
Additional Locations US, California, Santa Clara; US, Oregon, Hillsboro
Business Group Intel invents at the boundaries of technology to make amazing experiences possible for business and society. We harness the cloud, IoT, memory, programmable solutions, and 5G to disrupt industries and solve global challenges. Leading on policy, diversity, inclusion, education, and sustainability, we create value for shareholders, customers, and society.
Equal Employment Opportunity All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Benefits We offer a total compensation package that ranks among the best in the industry. It includes competitive pay, stock, bonuses, as well as benefits programs such as health, retirement, and vacation.
Learn more about all of our benefits .
Annual Salary Range USD 139,710.00 – 262,680.00 (US locations)
Work Model This role will require an on‑site presence. Note that posting details such as work model, location, or time type are subject to change.
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