Yoh, A Day & Zimmermann Company
Analog/Mixed-Signal IC Layout Engineer (Senior Level)
Yoh, A Day & Zimmermann Company, San Jose, California, United States, 95199
Analog/Mixed‑Signal IC Layout Engineer (Senior Level)
Location: San Jose, CA (Onsite 5 Days/Week)
Type: Full Time
Compensation: $120,000 - $192,000
Industry: Semiconductor / Infrastructure Software
Citizenship Requirement: No citizenship requirements; need to confirm.
Key Responsibilities
Lead and execute physical layout for complex analog and mixed‑signal integrated circuits in advanced technology nodes (including deep‑submicron and FinFET).
Collaborate with circuit designers to develop layouts for high‑speed and precision blocks such as TIAs, drivers, data converters, and clocking circuits.
Perform floorplanning, device‑level and block‑level routing, and top‑level integration for large‑scale chip assemblies.
Apply best‑practice layout techniques for reliability, thermal awareness, electromigration mitigation, and manufacturability.
Utilize industry‑standard EDA platforms for layout creation, verification, and physical sign‑off.
Work closely with distributed engineering teams across multiple locations.
Qualifications
Bachelor’s degree in Electrical or Computer Engineering with 8+ years of IC layout experience, or Master’s degree with 6+ years.
Demonstrated expertise designing high‑speed analog/mixed‑signal IC layouts in advanced technology nodes (e.g., 5nm, 3nm).
Strong knowledge of physical design concepts, semiconductor device behavior, and fabrication processes.
Proficiency with layout and verification tools (Cadence, Synopsys, Mentor, etc.).
Ability to plan schedules, manage assignments independently, and communicate across technical levels.
Experience with automation/scripting for layout productivity is a plus.
Willingness to travel occasionally as needed.
May provide guidance or oversight to team members.
Benefits
Medical, Prescription, Dental & Vision Benefits (20+ hours per week)
Health Savings Account (20+ hours per week)
Life & Disability Insurance (20+ hours per week)
MetLife Voluntary Benefits
Employee Assistance Program (EAP)
401(k) Retirement Savings Plan
Direct Deposit & weekly ePayroll
Referral Bonus Programs
Certification and training opportunities
Yoh, a Day & Zimmermann company, is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran.
For applicants in California, qualified applicants with arrest or conviction records will be considered in accordance with the Los Angeles County Fair Chance Ordinance and California Fair Chance Act.
It is unlawful in Massachusetts to require lie detector tests.
Visit
https://www.yoh.com/applicants-with-disabilities
to contact us if you have a disability and require accommodation in the application process.
By applying and submitting your resume, you authorize Yoh to review and reformat your resume to meet hiring clients’ preferences.
To learn more about Yoh’s privacy practices, please see our Candidate Privacy Notice:
https://www.yoh.com/privacy-notice
#J-18808-Ljbffr
Key Responsibilities
Lead and execute physical layout for complex analog and mixed‑signal integrated circuits in advanced technology nodes (including deep‑submicron and FinFET).
Collaborate with circuit designers to develop layouts for high‑speed and precision blocks such as TIAs, drivers, data converters, and clocking circuits.
Perform floorplanning, device‑level and block‑level routing, and top‑level integration for large‑scale chip assemblies.
Apply best‑practice layout techniques for reliability, thermal awareness, electromigration mitigation, and manufacturability.
Utilize industry‑standard EDA platforms for layout creation, verification, and physical sign‑off.
Work closely with distributed engineering teams across multiple locations.
Qualifications
Bachelor’s degree in Electrical or Computer Engineering with 8+ years of IC layout experience, or Master’s degree with 6+ years.
Demonstrated expertise designing high‑speed analog/mixed‑signal IC layouts in advanced technology nodes (e.g., 5nm, 3nm).
Strong knowledge of physical design concepts, semiconductor device behavior, and fabrication processes.
Proficiency with layout and verification tools (Cadence, Synopsys, Mentor, etc.).
Ability to plan schedules, manage assignments independently, and communicate across technical levels.
Experience with automation/scripting for layout productivity is a plus.
Willingness to travel occasionally as needed.
May provide guidance or oversight to team members.
Benefits
Medical, Prescription, Dental & Vision Benefits (20+ hours per week)
Health Savings Account (20+ hours per week)
Life & Disability Insurance (20+ hours per week)
MetLife Voluntary Benefits
Employee Assistance Program (EAP)
401(k) Retirement Savings Plan
Direct Deposit & weekly ePayroll
Referral Bonus Programs
Certification and training opportunities
Yoh, a Day & Zimmermann company, is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran.
For applicants in California, qualified applicants with arrest or conviction records will be considered in accordance with the Los Angeles County Fair Chance Ordinance and California Fair Chance Act.
It is unlawful in Massachusetts to require lie detector tests.
Visit
https://www.yoh.com/applicants-with-disabilities
to contact us if you have a disability and require accommodation in the application process.
By applying and submitting your resume, you authorize Yoh to review and reformat your resume to meet hiring clients’ preferences.
To learn more about Yoh’s privacy practices, please see our Candidate Privacy Notice:
https://www.yoh.com/privacy-notice
#J-18808-Ljbffr