Cadence
Senior Analog IC Designer - SerDes, Equity & Bonus
Cadence, San Jose, California, United States, 95199
A leading technology company in California is seeking a Lead Analog IC Designer to develop analog and mixed-signal IC circuit blocks. The ideal candidate will have a minimum of 3 years of experience in CMOS SerDes or high-speed I/O IC design. Responsibilities include driving designs from concept through final verification. The position offers a competitive salary range and includes various benefits such as bonus, equity, and healthcare options.
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