Test Engineer I - FPGA/SoC Verification

A leading embedded control applications provider located in San Jose is seeking an Engineer I - Test (Development) to define and implement test solutions for next generation FPGA SOC products. Responsibilities include working with design engineers to develop test methods and supporting initial silicon bring-up. The ideal candidate should have a BSEE/BSCS or equivalent, knowledge of CMOS circuits, and programming capabilities in C/C++ or JAVA. Pay range: $68,640 - $128,000 annually. #J-18808-Ljbffr