Senior Silicon Design Verification Engineer

A leading FPGA company based in San Jose is seeking a Sr Silicon Design Verification Engineer. The role involves performing functional logic verification, developing verification plans, and collaborating with various engineering teams. Candidates should have a degree in Electrical or Computer Science Engineering and 3-5 years of relevant experience. Expertise with OVM/UVM, System Verilog, and scripting languages like TCL/PERL/Python is required. This position offers a full-time shift work environment with opportunities to innovate in the tech industry. #J-18808-Ljbffr