Elevate Semiconductor
Analog Design Engineer (All Levels)
Elevate Semiconductor, San Diego, California, United States, 92189
At Elevate Semiconductor, our mission is to empower semiconductor and system test customers by delivering world‑class test integrated circuits (ICs) that tackle the industry's most complex automated test equipment (ATE) challenges. We pride ourselves on exceeding expectations by designing the lowest power, highest density solutions to achieve the lowest possible cost of test—both today and for the future.
Responsibilities
Collaborate with product and test engineering team for overall project success
Identify, recommend, and implement new systems, tools, processes and technologies to improve design, reuse, organizational processes and decision‑making
Schematic design and simulation of circuits for high speed and precision Analogue ATE circuits
Power efficient and high precision analog design
Layout pre‑placement and post‑layout simulation of circuits
Monte Carlo and corner analysis
Mixed‑signal simulation at chip level
Contribute to the development of innovative circuit architectures to optimize power, performance and density
Support IC characterization and test development to qualify for ATE specific parameters and use conditions
Qualifications
Bachelor's or Master's degree in Electrical Engineering or equivalent experience
Experience participating in or leading IC tapeouts from specification through production
Knowledge of semiconductor design, fabrication processes, and the overall IC lifecycle
Strong fundamentals in analog CMOS design and control theory
Experience with feedback loop design, stability analysis, and compensation techniques
Familiarity with industry‑standard EDA tools such as Cadence and Mentor, including LVS, DRC, and ERC
Experience with analog behavioral modeling and chip‑level simulation
Programming experience in one or more of the following: Verilog, Verilog‑A, C/C++, or Python
Ability to collaborate effectively across engineering, manufacturing, and applications teams
Strong communication skills and a thoughtful approach to solving complex design challenges
Preferred Qualifications
PhD degree
High voltage (100V+) and mixed voltage (multiple supply rails, 6 or more) design experience
Design experience in high speed multi‑Gbps circuits
Design experience with BiCMOS process technology
ATE specific experience
Benefits
100% Employer Paid Health Insurance (Medical, Dental, Vision)
Unlimited Paid Time Off
Performance Bonuses
Free Lunch Catered in by Local Restaurants
Private Equity Options
Retirement Plans
Sabbatical Program
Tuition Reimbursement
Volunteer Days
Relocation Assistance
Conference Attendance Support
Biweekly Phone Stipend
Employee Assistance Program
Salary range: $100,000.00‑$180,000.00 per year. Final compensation will depend on your experience, skill set, and how well you are able to highlight your background throughout the interview process.
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Responsibilities
Collaborate with product and test engineering team for overall project success
Identify, recommend, and implement new systems, tools, processes and technologies to improve design, reuse, organizational processes and decision‑making
Schematic design and simulation of circuits for high speed and precision Analogue ATE circuits
Power efficient and high precision analog design
Layout pre‑placement and post‑layout simulation of circuits
Monte Carlo and corner analysis
Mixed‑signal simulation at chip level
Contribute to the development of innovative circuit architectures to optimize power, performance and density
Support IC characterization and test development to qualify for ATE specific parameters and use conditions
Qualifications
Bachelor's or Master's degree in Electrical Engineering or equivalent experience
Experience participating in or leading IC tapeouts from specification through production
Knowledge of semiconductor design, fabrication processes, and the overall IC lifecycle
Strong fundamentals in analog CMOS design and control theory
Experience with feedback loop design, stability analysis, and compensation techniques
Familiarity with industry‑standard EDA tools such as Cadence and Mentor, including LVS, DRC, and ERC
Experience with analog behavioral modeling and chip‑level simulation
Programming experience in one or more of the following: Verilog, Verilog‑A, C/C++, or Python
Ability to collaborate effectively across engineering, manufacturing, and applications teams
Strong communication skills and a thoughtful approach to solving complex design challenges
Preferred Qualifications
PhD degree
High voltage (100V+) and mixed voltage (multiple supply rails, 6 or more) design experience
Design experience in high speed multi‑Gbps circuits
Design experience with BiCMOS process technology
ATE specific experience
Benefits
100% Employer Paid Health Insurance (Medical, Dental, Vision)
Unlimited Paid Time Off
Performance Bonuses
Free Lunch Catered in by Local Restaurants
Private Equity Options
Retirement Plans
Sabbatical Program
Tuition Reimbursement
Volunteer Days
Relocation Assistance
Conference Attendance Support
Biweekly Phone Stipend
Employee Assistance Program
Salary range: $100,000.00‑$180,000.00 per year. Final compensation will depend on your experience, skill set, and how well you are able to highlight your background throughout the interview process.
#J-18808-Ljbffr