TPI Global Solutions
Senior Validation Engineer
We are hiring a Senior Validation Engineer to support a Fortune 500 semiconductor industry client. This is a fully on‑site role in Santa Clara, CA, focused on memory interface bring‑up, electrical/functional validation, and lab‑based debug activities for next‑generation silicon. The project is a
immediate start
and requires an engineer with strong DDR and platform‑level validation experience.
Key Responsibilities
Perform electrical and functional validation of DDR4/DDR5 and LPDDR4/LPDDR5 memory interfaces, including timing, margins, and signal behavior.
Develop and execute validation test plans for memory controllers, PHY subsystems, and high‑speed I/O blocks.
Conduct hands‑on lab debug using oscilloscopes, logic analyzers, pattern generators, and other validation equipment.
Support early silicon bring‑up, identify functional or electrical issues, and drive cross‑functional debug to resolution.
Utilize scripting (Python/Tcl) to automate validation workflows, analyze results, and improve test efficiency.
Collaborate with design, architecture, and platform engineering teams to review test results and refine validation strategies.
Qualifications
Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field.
7+ years of silicon validation experience, including direct work on DDR or other high‑speed memory interfaces.
Strong hands‑on lab experience with oscilloscopes and debugging tools.
Experience with scripting languages such as Python or Tcl.
Background in FPGA‑based validation or embedded processors is preferred.
Excellent problem‑solving, communication, and cross‑team collaboration skills.
Seniority level Mid‑Senior level
Employment type Contract
Job function
Quality Assurance, Design, and Information Technology
Semiconductor Manufacturing, Computers and Electronics Manufacturing, and Electrical Equipment Manufacturing
Benefits Medical insurance
Base pay range $66.00/yr - $79.00/yr
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immediate start
and requires an engineer with strong DDR and platform‑level validation experience.
Key Responsibilities
Perform electrical and functional validation of DDR4/DDR5 and LPDDR4/LPDDR5 memory interfaces, including timing, margins, and signal behavior.
Develop and execute validation test plans for memory controllers, PHY subsystems, and high‑speed I/O blocks.
Conduct hands‑on lab debug using oscilloscopes, logic analyzers, pattern generators, and other validation equipment.
Support early silicon bring‑up, identify functional or electrical issues, and drive cross‑functional debug to resolution.
Utilize scripting (Python/Tcl) to automate validation workflows, analyze results, and improve test efficiency.
Collaborate with design, architecture, and platform engineering teams to review test results and refine validation strategies.
Qualifications
Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field.
7+ years of silicon validation experience, including direct work on DDR or other high‑speed memory interfaces.
Strong hands‑on lab experience with oscilloscopes and debugging tools.
Experience with scripting languages such as Python or Tcl.
Background in FPGA‑based validation or embedded processors is preferred.
Excellent problem‑solving, communication, and cross‑team collaboration skills.
Seniority level Mid‑Senior level
Employment type Contract
Job function
Quality Assurance, Design, and Information Technology
Semiconductor Manufacturing, Computers and Electronics Manufacturing, and Electrical Equipment Manufacturing
Benefits Medical insurance
Base pay range $66.00/yr - $79.00/yr
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