Logo
Draper

Senior FPGA Design Engineer

Draper, Clearfield, Utah, us, 84016

Save Job

Overview Draper is an independent, nonprofit research and development company headquartered in Cambridge, MA. The 2,000+ employees of Draper tackle important national challenges with a promise of delivering successful and usable solutions. From military defense and space exploration to biomedical engineering, lives often depend on the solutions we provide. Our multidisciplinary teams of engineers and scientists work in a collaborative environment that inspires the cross-fertilization of ideas necessary for true innovation. For more information about Draper, visit www.draper.com.

Job Description Summary A Senior ASIC Hardware Engineer specifies, designs, verifies, tests, and documents Application‑Specific Integrated Circuits. The engineer develops the architecture, designs circuits and/or HDL, performs simulations, performs physical layout, verifies and tests designs.

Duties/Responsibilities

Design and simulate circuits at transistor-level to implement architecture and requirement specifications

Contribute to system‑level design

Optimize hardware designs for performance, power, and cost

Evaluate the hardware feasibility of complex algorithms and requirements

Independently contribute to complex chip architectures and designs

Independently drive solutions to complex problems - develop requirements, propose ways forward when customer requirements are unclear or incomplete, and adapt appropriately to changes in requirements

Contribute to business development and proposal activities

Develop, document, and teach best practices to less experienced engineers

Perform or guide physical layout, including floor‑planning, and simulate circuits using extracted parasitics, contribute to design‑for‑test development.

Perform other duties as assigned

Skills/Abilities

Proficiency in integrated circuit design

Understanding of integrated circuits, semiconductors, and general computer architecture

Ability to write detailed design specifications

Ability to lead multi‑disciplinary technical teams

Excellent verbal and written communication skills

Excellent mathematical skills

Excellent organizational skills and attention to detail

Excellent time management skills with the proven ability to meet deadlines

Strong analytical and problem‑solving skills

Ability to prioritize tasks

Demonstrate strong organization, planning, and time management skills to achieve program goals

Education Requires a bachelor’s degree in Engineering, or related field. Master’s degree preferred.

Experience Requires 7‑10 years of experience with a bachelor’s degree, or 5‑10 years of experience with a master’s degree in ASIC Hardware Engineering or related.

Preferred Qualifications

Experience with low power circuit design

Experience with CMOS advanced nodes below 32nm

Experience with radiation‑hardened electronics

Additional Job Description Applicants selected for this position will be required to obtain and maintain a government security clearance.

Job Location Clearfield, Utah 84015.

Salary Range $82,300.00 - $205,750.00.

EEO Statement Draper is committed to creating an inclusive environment. We understand the value of inclusivity and its impact on a high‑performance culture. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, disability, age, sexual orientation, national origin, veteran status, or genetic information. Draper is committed to providing access, equal opportunity, and reasonable accommodation for individuals with disabilities in employment, its services, programs, and activities. To request reasonable accommodation, please contact hr@draper.com.

#J-18808-Ljbffr