Senior Serdes Analog & Mixed-Signal Architect

A leading semiconductor company in San Jose is seeking an experienced engineer to design circuits for high-speed interconnect transceivers. The ideal candidate will have significant experience in RF/Analog/Serdes design and proficiency with EDA tools. This role offers a competitive salary range of $157,000 to $243,000 and a comprehensive benefits package including generous time off and wellness support. Join a team committed to innovation in cutting-edge technology as we advance the world’s technology. #J-18808-Ljbffr