FHLB Des Moines
Senior Engineer II-Digital Design page is loaded## Senior Engineer II-Digital Designlocations:
AZ - Chandlertime type:
Full timeposted on:
Posted Todayjob requisition id:
R2751-25People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip’s nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our ; we affectionately refer to it as the *Aggregate System* and it’s won us countless awards for diversity and workplace excellence.Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over
without a great team dedicated to empowering innovation. People like you.Visit our
page to see what exciting opportunities and company
await!**Job Description:**Microchip's NCS Team is seeking an experienced Design engineer to support PHY (Physical Layer) development for our next generation of USB products. The role will include working with analog and digital engineers to create mixed-signal IPs and SoC products. As a Principal Digital Design Engineer, the candidate shall be working with multi-sited global Silicon Development Team in the areas of RTL design, design verification, synthesis, STA, and Test using an industry leading ASIC design flow. Candidate must be in the Chandler design center.**Requirements/Qualifications:**Qualifications/Requirements:* Bachelors degree with 7.5-9 years experience in digital design with solid, hands-on experience in RTL Coding and functional verification, or Masters degree with 5-6 years experience in digital design with solid, hands-on experience in RTL Coding and functional verification* Experience in USB and Ethernet PHY protocols is a strong plus-point.* Must have knowledge and experience in Verilog/System Verilog design and test bench creation.* Must have excellent debug skills in both functional and gate level simulations* Experience with Verification methodologies such as UVM/VMM is a desired skillset.* Experience in ASIC design flow including lint checking, Crossing Clock domain checking, DFT methodology, equivalence checking and synthesis.* Hands-on experience required with Mentor and Synopsys CAD tools such as Questa, Design Compiler, Formality and Spyglass.* Knowledge in synthesis for defining timing constraints to chip-level integration team and for supporting timing closure for sub-blocks.* Ability to solve timing constraint challenges including asynchronous designs with multiple clock domain crossings and for synchronous designs.* Knowledge of ASIC test methodology such as Stuck-At/At-Speed scan insertion is a plus.* Proficiency in a scripting language such as C, TCL, Perl, Awk, UNIX shell.* Knowledge of revision control tools such as CVS, Perforce, DesignSync, etc. and experience with tagging and release methodology* Support chip-level integration, verification, and validation teams* Provide design documentation, description, and information to internal customers.* Ability to work as part of digital, analog, and DSP design team and as part of global multi-sited Development team.* The candidate must possess good verbal and written skills and be able to participate in group meetings, provide project updates, and write functional and technical documents. Be proactive and be willing to learn and adapt quickly in a dynamic and cross-functional environment.**Travel Time:**0% - 25%**Physical Attributes:**Hearing, Seeing, Talking, Works Alone, Works Around Others**Physical Requirements:**80% sitting, 10% walking, 10% standingMicrochip Technology Inc is an equal opportunity/affirmative action employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected Veteran status, age, or any other characteristic protected by law.
For more information on applicable equal employment regulations, please refer to the .**To all recruitment agencies**: *Microchip Technology Inc. **does not** accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.*At Microchip, employees are our greatest strength. As one of the top performing semiconductor companies in the world, we are led by a set of guiding values and a mission to empower innovation to enhance the human experience. We work tirelessly to create a company culture that highlights how important every employee is to our mission. #J-18808-Ljbffr
AZ - Chandlertime type:
Full timeposted on:
Posted Todayjob requisition id:
R2751-25People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip’s nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our ; we affectionately refer to it as the *Aggregate System* and it’s won us countless awards for diversity and workplace excellence.Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over
without a great team dedicated to empowering innovation. People like you.Visit our
page to see what exciting opportunities and company
await!**Job Description:**Microchip's NCS Team is seeking an experienced Design engineer to support PHY (Physical Layer) development for our next generation of USB products. The role will include working with analog and digital engineers to create mixed-signal IPs and SoC products. As a Principal Digital Design Engineer, the candidate shall be working with multi-sited global Silicon Development Team in the areas of RTL design, design verification, synthesis, STA, and Test using an industry leading ASIC design flow. Candidate must be in the Chandler design center.**Requirements/Qualifications:**Qualifications/Requirements:* Bachelors degree with 7.5-9 years experience in digital design with solid, hands-on experience in RTL Coding and functional verification, or Masters degree with 5-6 years experience in digital design with solid, hands-on experience in RTL Coding and functional verification* Experience in USB and Ethernet PHY protocols is a strong plus-point.* Must have knowledge and experience in Verilog/System Verilog design and test bench creation.* Must have excellent debug skills in both functional and gate level simulations* Experience with Verification methodologies such as UVM/VMM is a desired skillset.* Experience in ASIC design flow including lint checking, Crossing Clock domain checking, DFT methodology, equivalence checking and synthesis.* Hands-on experience required with Mentor and Synopsys CAD tools such as Questa, Design Compiler, Formality and Spyglass.* Knowledge in synthesis for defining timing constraints to chip-level integration team and for supporting timing closure for sub-blocks.* Ability to solve timing constraint challenges including asynchronous designs with multiple clock domain crossings and for synchronous designs.* Knowledge of ASIC test methodology such as Stuck-At/At-Speed scan insertion is a plus.* Proficiency in a scripting language such as C, TCL, Perl, Awk, UNIX shell.* Knowledge of revision control tools such as CVS, Perforce, DesignSync, etc. and experience with tagging and release methodology* Support chip-level integration, verification, and validation teams* Provide design documentation, description, and information to internal customers.* Ability to work as part of digital, analog, and DSP design team and as part of global multi-sited Development team.* The candidate must possess good verbal and written skills and be able to participate in group meetings, provide project updates, and write functional and technical documents. Be proactive and be willing to learn and adapt quickly in a dynamic and cross-functional environment.**Travel Time:**0% - 25%**Physical Attributes:**Hearing, Seeing, Talking, Works Alone, Works Around Others**Physical Requirements:**80% sitting, 10% walking, 10% standingMicrochip Technology Inc is an equal opportunity/affirmative action employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected Veteran status, age, or any other characteristic protected by law.
For more information on applicable equal employment regulations, please refer to the .**To all recruitment agencies**: *Microchip Technology Inc. **does not** accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.*At Microchip, employees are our greatest strength. As one of the top performing semiconductor companies in the world, we are led by a set of guiding values and a mission to empower innovation to enhance the human experience. We work tirelessly to create a company culture that highlights how important every employee is to our mission. #J-18808-Ljbffr