Broadcom
Broadcom is searching for a Physical IC Design Engineer to join the Data Center Solutions Group.
This role focuses on driving next-generation Artificial Intelligence and Machine Learning ecosystems through PCIe Switch Products and managing mega datacenters with Enterprise Storage Products. The position requires in-depth knowledge of all Physical Design aspects from RTL to silicon tape-out.
Responsibilities
Execution of Physical Design, Synthesis, Physical Verification, and Timing Closure
Setup and Synthesizing RTL
Timing closure through various methods and strategies
EM/IR Analysis
Place and Route
Clock Tree Synthesis
Floor‑planning and Layout
Flow and Methodology Development
Collaborating with IC Design RTL Engineers
Must work in person at our San Jose site: no remote work allowed.
Required attributes
TCL/PERL Scripting
Proficiency in related EDA Tools
Full physical design cycle experience: RTL to Tape‑out
Excellent verbal and written communication skills
Education and Experience Requirements
Minimum: Bachelor’s degree in Electrical Engineering or Electronics Engineering
8+ Years of relevant experience
Compensation And Benefits The annual base salary range for this position is $120,000 - $192,000. This position is also eligible for a discretionary annual bonus and equity in accordance with the relevant plan documents and equity award agreements.
Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans; 401(K) participation including company matching; Employee Stock Purchase Program (ESPP); Employee Assistance Program (EAP); company paid holidays; paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.
R024620
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This role focuses on driving next-generation Artificial Intelligence and Machine Learning ecosystems through PCIe Switch Products and managing mega datacenters with Enterprise Storage Products. The position requires in-depth knowledge of all Physical Design aspects from RTL to silicon tape-out.
Responsibilities
Execution of Physical Design, Synthesis, Physical Verification, and Timing Closure
Setup and Synthesizing RTL
Timing closure through various methods and strategies
EM/IR Analysis
Place and Route
Clock Tree Synthesis
Floor‑planning and Layout
Flow and Methodology Development
Collaborating with IC Design RTL Engineers
Must work in person at our San Jose site: no remote work allowed.
Required attributes
TCL/PERL Scripting
Proficiency in related EDA Tools
Full physical design cycle experience: RTL to Tape‑out
Excellent verbal and written communication skills
Education and Experience Requirements
Minimum: Bachelor’s degree in Electrical Engineering or Electronics Engineering
8+ Years of relevant experience
Compensation And Benefits The annual base salary range for this position is $120,000 - $192,000. This position is also eligible for a discretionary annual bonus and equity in accordance with the relevant plan documents and equity award agreements.
Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans; 401(K) participation including company matching; Employee Stock Purchase Program (ESPP); Employee Assistance Program (EAP); company paid holidays; paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.
R024620
#J-18808-Ljbffr