Remote Jobs
Sr DFT Engineer (Tessent/IJTAG Specialist) - Remote
Remote Jobs, Boston, Massachusetts, us, 02298
Employer Industry
Semiconductor Engineering
Why consider this job opportunity
Salary up to $160,000
Comprehensive benefits package, including medical, dental, and vision coverage
15 days of PTO and 10 paid holidays per year
Opportunity for career advancement and growth within the organization
Flexible remote work option available
Tuition reimbursement for further education
What to Expect (Job Responsibilities)
Author and edit ICL/PDL to support unique hardware instruments and complex IP
Drive DFT insertion and pattern generation using the Tessent Shell environment
Develop custom ATPG patterns and perform gate-level simulations (GLS) to ensure high test coverage
Support post-silicon bring-up and failure analysis using custom-engineered test sequences
Collaborate with cross-functional teams to integrate DFT solutions
What is Required (Qualifications)
Expert-level experience with the Siemens Tessent tool suite
Proven ability to customize PDL/ICL for non-standard test delivery
Strong background in Scan, ATPG, JTAG, and Hierarchical DFT
Proficiency in Tcl/Python for flow automation
Minimum of 5 years of experience with a track record of successful tape-outs
How to Stand Out (Preferred Qualifications)
Experience with advanced test solutions in semiconductor design
Familiarity with post-silicon debug techniques
Knowledge of industry-standard testing methodologies
Strong communication and teamwork skills
Previous experience in a remote work environment
We prioritize candidate privacy and champion equal-opportunity employment. Central to our mission is our partnership with companies that share this commitment. We aim to foster a fair, transparent, and secure hiring environment for all. If you encounter any employer not adhering to these principles, please bring it to our attention immediately.
We are not the EOR (Employer of Record) for this position. Our role in this specific opportunity is to connect outstanding candidates with a top-tier employer.
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Why consider this job opportunity
Salary up to $160,000
Comprehensive benefits package, including medical, dental, and vision coverage
15 days of PTO and 10 paid holidays per year
Opportunity for career advancement and growth within the organization
Flexible remote work option available
Tuition reimbursement for further education
What to Expect (Job Responsibilities)
Author and edit ICL/PDL to support unique hardware instruments and complex IP
Drive DFT insertion and pattern generation using the Tessent Shell environment
Develop custom ATPG patterns and perform gate-level simulations (GLS) to ensure high test coverage
Support post-silicon bring-up and failure analysis using custom-engineered test sequences
Collaborate with cross-functional teams to integrate DFT solutions
What is Required (Qualifications)
Expert-level experience with the Siemens Tessent tool suite
Proven ability to customize PDL/ICL for non-standard test delivery
Strong background in Scan, ATPG, JTAG, and Hierarchical DFT
Proficiency in Tcl/Python for flow automation
Minimum of 5 years of experience with a track record of successful tape-outs
How to Stand Out (Preferred Qualifications)
Experience with advanced test solutions in semiconductor design
Familiarity with post-silicon debug techniques
Knowledge of industry-standard testing methodologies
Strong communication and teamwork skills
Previous experience in a remote work environment
We prioritize candidate privacy and champion equal-opportunity employment. Central to our mission is our partnership with companies that share this commitment. We aim to foster a fair, transparent, and secure hiring environment for all. If you encounter any employer not adhering to these principles, please bring it to our attention immediately.
We are not the EOR (Employer of Record) for this position. Our role in this specific opportunity is to connect outstanding candidates with a top-tier employer.
#J-18808-Ljbffr