Broadcom
Job Description:
Responsibilities
Work on Design Implementation activities related to place and route and/or timing closure – floor‑planning, partitioning, placement, clock tree synthesis, route, timing analysis, timing closure, physical verification (LVS/DRC).
Drive tools and methodologies to achieve desired PPA metrics.
Complete equivalence checks, STA, timing closure and power optimization.
Implement timing and functional ECOs.
Apply Broadcom's proven design methodology and milestone flow to meet Broadcom's rigorous criteria for achieving Right‑first‑time silicon.
Qualifications
Primary expertise in place and route and/or timing (constraints, STA).
Proficient in design implementation activities both at block and SoC level.
Well experienced in floor‑planning, partitioning, placement, clock tree synthesis, route and physical verification and/or constraints development, constraints validation, timing analysis and closure.
Experience with formal verification, timing analysis and ECO implementation.
Experience with tools such as Primetime, ICC2, Innovus, Caliber, LEC, PrimeTime etc.
Full chip tape‑out experience based on 7nm and lower technologies.
Hands‑on experience with timing analysis and place and route tools for ASIC/SoC Design.
Additional Requirements
Good problem solver.
Self‑starter who can work independently.
Experienced in working in a global team and dynamic environment.
Possess ability to learn and adapt to new tools and methodologies on the fly.
Excellent communication skills.
Education
BS in Electrical Engineering/Computer Engineering or related field and 12+ years of related experience OR an MS in Electrical Engineering/Computer Engineering or related field and 10+ years of related experience.
Compensation and Benefits The annual base salary range for this position is $141,300 – $226,000. This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.
Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.
Seniority level Mid‑Senior level
Employment type Full‑time
Job function Information Technology
Industries Semiconductor Manufacturing
Referrals increase your chances of interviewing at Broadcom by 2x.
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Responsibilities
Work on Design Implementation activities related to place and route and/or timing closure – floor‑planning, partitioning, placement, clock tree synthesis, route, timing analysis, timing closure, physical verification (LVS/DRC).
Drive tools and methodologies to achieve desired PPA metrics.
Complete equivalence checks, STA, timing closure and power optimization.
Implement timing and functional ECOs.
Apply Broadcom's proven design methodology and milestone flow to meet Broadcom's rigorous criteria for achieving Right‑first‑time silicon.
Qualifications
Primary expertise in place and route and/or timing (constraints, STA).
Proficient in design implementation activities both at block and SoC level.
Well experienced in floor‑planning, partitioning, placement, clock tree synthesis, route and physical verification and/or constraints development, constraints validation, timing analysis and closure.
Experience with formal verification, timing analysis and ECO implementation.
Experience with tools such as Primetime, ICC2, Innovus, Caliber, LEC, PrimeTime etc.
Full chip tape‑out experience based on 7nm and lower technologies.
Hands‑on experience with timing analysis and place and route tools for ASIC/SoC Design.
Additional Requirements
Good problem solver.
Self‑starter who can work independently.
Experienced in working in a global team and dynamic environment.
Possess ability to learn and adapt to new tools and methodologies on the fly.
Excellent communication skills.
Education
BS in Electrical Engineering/Computer Engineering or related field and 12+ years of related experience OR an MS in Electrical Engineering/Computer Engineering or related field and 10+ years of related experience.
Compensation and Benefits The annual base salary range for this position is $141,300 – $226,000. This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.
Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.
Seniority level Mid‑Senior level
Employment type Full‑time
Job function Information Technology
Industries Semiconductor Manufacturing
Referrals increase your chances of interviewing at Broadcom by 2x.
#J-18808-Ljbffr