Senior System Power Architect

Lattice Overview There is energy here…energy you can feel crackling at any of our international locations. It’s an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world‑class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality. Energy feeds on energy. If you flourish in a fast paced, results‑oriented environment, if you want to achieve individual success within a “team first” organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you’re looking for.

Responsibilities & Skills Responsibilities:

TheSeniorSystem PowerEngineeris responsible forthe design and analysisoflow-power hardware and software systems. This includes low-power FPGA system design, power model development, and performance/power analysis. The ideal candidate can work with cross‑functional hardware, software, product marketing, and applications teams to understand product requirements and deliver best in class power efficiency for our designs and solutions. Responsibilities:

Create power budgets, and perform power analysis, measurement, and debug

Develop FPGA-focused power and performance benchmarks

Develop power models and modeling methodologies, and implement in software

Establish scalable software infrastructure for regression and benchmark tracking

Correlate power models with post‑silicon measurements

Lead/mentor junior engineers

Qualifications:

BS, MS, and/or PhD in Electrical Engineering or related fields

Multiple years of experience working in related field (BSEE, 10+ years, MS 8+ years, PhD 5+ years)

Experience with power measurements, and power modeling and analysis of power/performance across various hardware IPs (e.g. CPU, GPU, DSP, TPU)

Knowledge of RTL code such as VHDL or Verilog and FPGA implementation flow (RTL, synthesis, P&R, timing closure, and bitstream generation)

Proficiency in a scripting language (e.g., Python) and a programming language (C/C++, Java)

Detailed oriented, with excellent problem‑solving skills, communication skills, and the ability to work collaboratively in a fast‑paced, team environment

Benefits Benefits: The base pay for this role is between $175,000 to $219,000 per year. In addition to base salary, we offer an incentive plan bonus, and new hire equity for a competitive total compensation package. Lattice recognizes that employees are its greatest asset and the driving force behind success in a highly competitive, global industry. Lattice continually strives to provide a comprehensive compensation and benefits program to attract, retain, motivate, reward and celebrate the highest caliber employees in the industry.

Lattice is an international, service‑driven developer of innovative low cost, low power programmable design solutions. Our global workforce, some 800 strong, shares a total commitment to customer success and an unbending will to win. For more information about how our FPGA, CPLD and programmable power management devices help our customers unlock their innovation, visit www.latticesemi.com. You can also follow us via Twitter, Facebook, or RSS. At Lattice, we value the diversity of individuals, ideas, perspectives, insights and values, and what they bring to the workplace. Applications are welcome from all qualified candidates.

LatticeFeel the energy.

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