Impinj
Principal RTL Verification Engineer – Impinj
Impinj is a leading RAIN RFID provider and Internet of Things pioneer. We’re inventing ways to connect everything to the Internet, including retail apparel, general merchandise, healthcare items, automotive parts, airline baggage, food, and more. With more than 100 billion items connected to date, our platform is used by multiple Fortune 500 enterprises around the world. Join Impinj and help us realize our vision of a boundless IoT—connecting trillions of everyday items to the Internet.
Team Overview As Principal RTL Verification Engineer you will lead the SoC verification for Impinj’s next‑generation Reader ICs and own the IP and SoC verification methodologies and environment (tools and flows). You will use your expertise in RTL verification to take the next‑generation Reader ICs from concept through to production.
What You’ll Do
Own the development of a UVM‑based IP and SoC verification framework for Impinj’s next‑generation RAIN RFID Reader ICs to assure A0 production‑worthy silicon.
Deliver a parameterized, modular, scalable verification, validation methodology and automation framework, enabling AMS and Digital IPs to be seamlessly integrated across different Reader IC SoC products (handheld versus fixed Reader).
Lead the definition and development of verification infrastructure such as coverage tools, bus functional models, subsystem behavioral models, RTL code, and SystemVerilog‑based test benches.
Leverage your knowledge of advanced analog modeling techniques to enable efficient mixed‑signal co‑simulation and quantifiable analog coverage.
Lead verification of externally and internally sourced IP blocks.
Review and evaluate design verification plans developed by other engineers.
Work with systems and hardware teams to develop and extend HW/SW co‑simulation capabilities to enable verification of Reader firmware prior to A0 tape‑out.
Work with the RAIN RFID End‑Point IC verification team to enable system verification and emulation.
Mentor Reader IC verification engineer team members.
Collaborate across logic, analog, test, and systems engineering teams to deliver new features and products to market.
Provide project planning and budgetary input on verification tooling requirements.
Support continuous improvement of existing RAIN RFID products through feature and performance enhancements.
What You’ll Bring
Bachelor’s degree in electrical or computer engineering, or equivalent practical experience.
15+ years of relevant industry experience; coursework in computer architecture preferred.
Extensive experience in mixed‑signal IP and SoC RTL verification for complex multi‑clock and multi‑power‑domain SoCs with complex reset and power‑bring‑up sequences using UVM and UPF methodologies.
Expertise creating and implementing RTL functional and AMS verification test plans.
Experience in the implementation and verification of microcontroller microarchitectures and complex finite‑state machines.
Experience defining and developing bus functional models, subsystem behavioral models and architectural checkers.
Experience verifying integration of external IP blocks.
Demonstrated expertise in creating a unified testing approach and integration strategy to enable verification of IPs, SoC and software firmware inclusive of production DFT patterns.
Hands‑on experience developing SystemVerilog‑based Digital‑Mixed‑Signal functional test benches using real‑numbered models, SV assertions, reusable sequences, and coverage monitors for metric‑driven verification.
Proven experience bringing multiple complex mixed‑signal IP and SoC designs from concept through tape‑out.
Familiarity with CI/CD systems and RTL coverage tools.
Scripting proficiency in Perl, Python, Ruby or UNIX shell.
Excellent written and verbal communication skills.
Excellent teamwork and mentoring skills.
Compensation & Benefits Typical base pay range in the U.S. is $179,700 – $269,600. Additional rewards include merit increases, annual bonus, stock, and sales incentives. U.S. employees have access to healthcare benefits, a 401(k) plan with company match, and other benefits.
Why Work at Impinj We support remote work or a desk with a view, provide weekly Q&A sessions with executives, and foster an environment of openness and innovation. We celebrated achievements, offer an open paid time‑off policy, and respect work/life balance. Our headquarters in Seattle offers spectacular views, and we have a site in Porto Alegre, Brazil.
Equal Opportunity Employer Impinj is an equal‑opportunity employer and does not discriminate on the basis of race, religion, color, national origin, sex, gender, sexual orientation, age, marital status, veteran status, or disability status. We provide reasonable accommodation for applicants with disabilities. Contact us to request accommodation.
Seniority Level Mid‑Senior level
Employment Type Full‑time
Job Function Quality Assurance
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Team Overview As Principal RTL Verification Engineer you will lead the SoC verification for Impinj’s next‑generation Reader ICs and own the IP and SoC verification methodologies and environment (tools and flows). You will use your expertise in RTL verification to take the next‑generation Reader ICs from concept through to production.
What You’ll Do
Own the development of a UVM‑based IP and SoC verification framework for Impinj’s next‑generation RAIN RFID Reader ICs to assure A0 production‑worthy silicon.
Deliver a parameterized, modular, scalable verification, validation methodology and automation framework, enabling AMS and Digital IPs to be seamlessly integrated across different Reader IC SoC products (handheld versus fixed Reader).
Lead the definition and development of verification infrastructure such as coverage tools, bus functional models, subsystem behavioral models, RTL code, and SystemVerilog‑based test benches.
Leverage your knowledge of advanced analog modeling techniques to enable efficient mixed‑signal co‑simulation and quantifiable analog coverage.
Lead verification of externally and internally sourced IP blocks.
Review and evaluate design verification plans developed by other engineers.
Work with systems and hardware teams to develop and extend HW/SW co‑simulation capabilities to enable verification of Reader firmware prior to A0 tape‑out.
Work with the RAIN RFID End‑Point IC verification team to enable system verification and emulation.
Mentor Reader IC verification engineer team members.
Collaborate across logic, analog, test, and systems engineering teams to deliver new features and products to market.
Provide project planning and budgetary input on verification tooling requirements.
Support continuous improvement of existing RAIN RFID products through feature and performance enhancements.
What You’ll Bring
Bachelor’s degree in electrical or computer engineering, or equivalent practical experience.
15+ years of relevant industry experience; coursework in computer architecture preferred.
Extensive experience in mixed‑signal IP and SoC RTL verification for complex multi‑clock and multi‑power‑domain SoCs with complex reset and power‑bring‑up sequences using UVM and UPF methodologies.
Expertise creating and implementing RTL functional and AMS verification test plans.
Experience in the implementation and verification of microcontroller microarchitectures and complex finite‑state machines.
Experience defining and developing bus functional models, subsystem behavioral models and architectural checkers.
Experience verifying integration of external IP blocks.
Demonstrated expertise in creating a unified testing approach and integration strategy to enable verification of IPs, SoC and software firmware inclusive of production DFT patterns.
Hands‑on experience developing SystemVerilog‑based Digital‑Mixed‑Signal functional test benches using real‑numbered models, SV assertions, reusable sequences, and coverage monitors for metric‑driven verification.
Proven experience bringing multiple complex mixed‑signal IP and SoC designs from concept through tape‑out.
Familiarity with CI/CD systems and RTL coverage tools.
Scripting proficiency in Perl, Python, Ruby or UNIX shell.
Excellent written and verbal communication skills.
Excellent teamwork and mentoring skills.
Compensation & Benefits Typical base pay range in the U.S. is $179,700 – $269,600. Additional rewards include merit increases, annual bonus, stock, and sales incentives. U.S. employees have access to healthcare benefits, a 401(k) plan with company match, and other benefits.
Why Work at Impinj We support remote work or a desk with a view, provide weekly Q&A sessions with executives, and foster an environment of openness and innovation. We celebrated achievements, offer an open paid time‑off policy, and respect work/life balance. Our headquarters in Seattle offers spectacular views, and we have a site in Porto Alegre, Brazil.
Equal Opportunity Employer Impinj is an equal‑opportunity employer and does not discriminate on the basis of race, religion, color, national origin, sex, gender, sexual orientation, age, marital status, veteran status, or disability status. We provide reasonable accommodation for applicants with disabilities. Contact us to request accommodation.
Seniority Level Mid‑Senior level
Employment Type Full‑time
Job Function Quality Assurance
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