Intel
Senior Formal Verification Engineer – AI SoC Development
Intel, Santa Clara, California, us, 95053
Key Responsibilities
Own formal verification strategy and execution for complex SoC IP blocks and subsystems.
Develop and maintain formal verification environments using SystemVerilog Assertions (SVA) and industry-standard formal tools.
Write and review formal properties, constraints, and coverage goals to achieve exhaustive verification.
Collaborate with design and simulation teams to identify corner cases and complement dynamic verification.
Drive formal sign-off, including convergence analysis and coverage closure.
Contribute to pre-silicon verification, chip bring-up, and post-silicon debug support.
Mentor junior engineers and establish best practices for formal verification methodology
Additional Responsibilities
Define and develop scalable, reusable verification plans for block, subsystem, and SoC levels.
Execute verification plans and run emulation and system simulation models
to
validate design, analyze power/performance, and uncover bugs.
Debug and root-cause issues in the presilicon environment; implement corrective measures.
Collaborate with architects, RTL developers, and physical design teams to improve verification of complex features.
Document test plans and lead technical reviews with design and architecture teams.
Incorporate and execute
security verification activities
within regression and debug tests.
Maintain and enhance existing
functional verification infrastructure and methodology .
Apply learnings from post-silicon validation to improve coverage and quality for future products.
Qualifications Minimum Qualifications
Bachelor's degree in Electrical Engineering, Computer Engineering, or Computer Science with 10+ years of related experience.
7+ years of experience in ASIC/SoC verification with at least 3+ years focused on formal verification.
Preferred Qualifications
Expertise in formal verification methodologies and tools (e.g., JasperGold, VC Formal, Questa Formal).
Strong knowledge of System Verilog Assertions (SVA) and property-based verification.
Deep understanding of digital design concepts, clock domain crossings, and low-power design techniques.
Familiarity with UVM-based simulation environments and how formal complements dynamic verification.
Scripting skills (Python, TCL, Perl) for automation and flow optimization.
Ability to lead projects, work cross-functionally, and deliver under tight schedules.
Strong analytical skills, attention to detail, and a collaborative mindset.
Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.
Job Type: Experienced Hire Shift: Shift 1 (United States of America) Primary Location: US, California, Folsom Additional Locations: US, California, Santa Clara, US, Oregon, Hillsboro
Business group: Intel makes possible the most amazing experiences of the future. You may know us for our processors. But we do so much more. Intel invents at the boundaries of technology to make amazing experiences possible for business and society, and for every person on Earth. Harnessing the capability of the cloud, the ubiquity of the Internet of Things, the latest advances in memory and programmable solutions, and the promise of always-on 5G connectivity, Intel is disrupting industries and solving global challenges. Leading on policy, diversity, inclusion, education and sustainability, we create value for our stockholders, customers, and society.
Position of Trust: This role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter.
Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:
https://intel.wd1.myworkdayjobs.com/External/page/1025c144664a100150b4b1665c750003
Annual Salary Range for jobs which could be performed in the US: $214,730.00-303,140.00 USD The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.
Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
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Own formal verification strategy and execution for complex SoC IP blocks and subsystems.
Develop and maintain formal verification environments using SystemVerilog Assertions (SVA) and industry-standard formal tools.
Write and review formal properties, constraints, and coverage goals to achieve exhaustive verification.
Collaborate with design and simulation teams to identify corner cases and complement dynamic verification.
Drive formal sign-off, including convergence analysis and coverage closure.
Contribute to pre-silicon verification, chip bring-up, and post-silicon debug support.
Mentor junior engineers and establish best practices for formal verification methodology
Additional Responsibilities
Define and develop scalable, reusable verification plans for block, subsystem, and SoC levels.
Execute verification plans and run emulation and system simulation models
to
validate design, analyze power/performance, and uncover bugs.
Debug and root-cause issues in the presilicon environment; implement corrective measures.
Collaborate with architects, RTL developers, and physical design teams to improve verification of complex features.
Document test plans and lead technical reviews with design and architecture teams.
Incorporate and execute
security verification activities
within regression and debug tests.
Maintain and enhance existing
functional verification infrastructure and methodology .
Apply learnings from post-silicon validation to improve coverage and quality for future products.
Qualifications Minimum Qualifications
Bachelor's degree in Electrical Engineering, Computer Engineering, or Computer Science with 10+ years of related experience.
7+ years of experience in ASIC/SoC verification with at least 3+ years focused on formal verification.
Preferred Qualifications
Expertise in formal verification methodologies and tools (e.g., JasperGold, VC Formal, Questa Formal).
Strong knowledge of System Verilog Assertions (SVA) and property-based verification.
Deep understanding of digital design concepts, clock domain crossings, and low-power design techniques.
Familiarity with UVM-based simulation environments and how formal complements dynamic verification.
Scripting skills (Python, TCL, Perl) for automation and flow optimization.
Ability to lead projects, work cross-functionally, and deliver under tight schedules.
Strong analytical skills, attention to detail, and a collaborative mindset.
Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.
Job Type: Experienced Hire Shift: Shift 1 (United States of America) Primary Location: US, California, Folsom Additional Locations: US, California, Santa Clara, US, Oregon, Hillsboro
Business group: Intel makes possible the most amazing experiences of the future. You may know us for our processors. But we do so much more. Intel invents at the boundaries of technology to make amazing experiences possible for business and society, and for every person on Earth. Harnessing the capability of the cloud, the ubiquity of the Internet of Things, the latest advances in memory and programmable solutions, and the promise of always-on 5G connectivity, Intel is disrupting industries and solving global challenges. Leading on policy, diversity, inclusion, education and sustainability, we create value for our stockholders, customers, and society.
Position of Trust: This role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter.
Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:
https://intel.wd1.myworkdayjobs.com/External/page/1025c144664a100150b4b1665c750003
Annual Salary Range for jobs which could be performed in the US: $214,730.00-303,140.00 USD The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.
Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
#J-18808-Ljbffr