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Magnefy

FPGA/ASIC Digital Signal Processing Engineer

Magnefy, San Francisco

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FPGA/ASIC Digital Signal Processing Engineer

FPGA/ASIC Digital Signal Processing Engineer

Magnefy is a venture-backed pre-seed stage startup redefining predictive maintenance for critical power infrastructure—transformers, switchgear, and generators—using AI-powered, high-frequency magnetic sensing.

We’re looking for an innovative and mission-driven FPGA/ASIC Digital Signal Processing (DSP) Engineer to lead the DSP pipelines, with the ability to architect, design, and optimize systems that combine real-time data acquisition, processing, and cloud integration of our edge AIoT sensing platform. You’ll work hands-on across firmware and hardware—from prototyping to system integration and field deployment—translating real customer needs into scalable solutions.

This is a rare opportunity to shape a transformative product from the ground up and grow into a key technical leader at a fast-moving startup.

What You Will Do

Join Magnefy to lead the development of real-time DSP pipelines for our edge AIoT platform, enabling early fault detection in critical power infrastructure.

DSP Algorithm Development

  • Design and implement real-time signal processing (filtering, FFT, spectral/harmonic analysis) on FPGA/ASIC using Verilog/VHDL
  • Build and validate DSP models in Python or MATLAB
  • Optimize for low power, low latency, and high reliability

System Integration

  • Integrate FPGA with sensor nodes and MCUs
  • Design data flow to cloud using protocols like MQTT, LoRa, or Wi-Fi
  • Collaborate across sensor, firmware, and cloud teams for robust system performance

Testing & Deployment

  • Lead lab and field validation of DSP systems
  • Debug, optimize, and support deployment at customer sites

Innovation & Leadership

  • Stay current on DSP and edge AI trends
  • Document designs and define product roadmap

Key Qualifications

FPGA/ASIC Design & Implementation :

  • Strong experience with Verilog/VHDL for FPGA systems (Xilinx, Intel, etc.)
  • Deep understanding of timing closure, synthesis, and hardware optimization
  • Exposure to ASIC prototyping, design-for-test (DFT), and RTL design practices
  • Capable of architecting FPGA designs with future ASIC integration in mind

Digital Signal Processing (DSP) :

  • Proficient in real-time DSP: filter design, FFT, harmonics detection, and signal conditioning
  • Skilled in noise suppression and spectral feature extraction under tight latency/power constraints
  • Experience with Python/MATLAB for DSP modeling, verification, and system-level validation
  • Comfortable working hands-on with lab tools (oscilloscopes, logic analyzers, spectrum analyzers)
  • Able to troubleshoot real-world noisy signals and field deployment challenges

Education & Experience :

  • BS or MS in Electrical or Computer Engineering
  • 2–5 years of experience in embedded system design, DSP development, and FPGA/ASIC projects

Nice to Have

  • Experience with ASIC bring-up, RTL-to-GDSII flow, and collaboration with silicon foundries
  • Familiarity with embedded ML acceleration or DSP-ML co-design for ASIC
  • Background in ultra-low-power hardware and system-level design tradeoffs
  • Experience with multi-modal sensing systems (e.g., combining magnetic, thermal, acoustic)
  • Knowledge of IoT edge connectivity protocols and cloud integration (MQTT, AWS IoT, etc.)
  • Proficiency in C/C++ or Python for system-level validation or driver development
  • Understanding of secure embedded systems and firmware update frameworks

General Information

  • Travel: up to 10%

Seniority level

  • Seniority level

    Mid-Senior level

Employment type

  • Employment type

    Full-time

Job function

  • Job function

    Engineering and Information Technology

  • Industries

    Electric Power Transmission, Control, and Distribution

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