Lockheed Martin
Description
Lockheed Martin Space is seeking a Field Programmable Gate Array (FPGA) Design Engineer to work on space-based mission processing capabilities at the edge. The engineer will evolve mission processing applications of remote sensing payloads onto flight hardware for onboard mission processing operations. In this role, the FPGA Design Engineer will leverage the Vivado Design Suite and hardware design languages VHDL and Verilog to deploy processing code and algorithms onto flight hardware. The position will work alongside research scientists, software engineers, and other FPGA engineers on the APEX (Advanced Programs and Exploitation) team.
Responsibilities
Develop an understanding of mission processing code written in C++ and implement for hardware processing.
Develop, integrate, and test processor subsystem features and interfaces in FPGA hardware.
Generate requirements, create FPGA code, and develop test benches.
Basic Qualifications
Bachelor of Science or higher from an accredited college in Electrical Engineering, Computer Engineering, or related discipline, or equivalent experience/combined education.
Ability to obtain a TS/SCI Clearance required for this role.
Understanding of HDL Languages (VHDL & Verilog).
Experience designing with Vivado.
Desired Skills
Proficient in Matlab & C++.
Digital logic design experience.
Experience interfacing FPGAs with processors.
Experience with Vitis Model Composer.
Experience with Matlab HDL Coder.
Familiarity with Xilinx platforms and tools.
Knowledge of FPGA concepts like clock domains, memory hierarchies, and routing.
Demonstrated experience in ASIC / FPGA life cycle (architecture, design, simulation, verification, validation, integration & test).
Knowledge of space-grade/qualified FPGAs and ASICs.
Security Clearance This position requires a government security clearance; you must be a US Citizen for consideration.
Clearance Level: Top Secret
Benefits and Compensation Annual base salary range: $145,200 – $255,990. Benefits offered include Medical, Dental, Vision, Life Insurance, Short-Term Disability, Long-Term Disability, 401(k) match, Flexible Spending Accounts, EAP, Education Assistance, Parental Leave, Paid time off, and Holidays.
Remotes and Work Schedules Part-time Remote Telework: The employee selected will work part of the work schedule remotely and part of the schedule at a designated Lockheed Martin facility. The specific weekly schedule will be discussed during the hiring process. Lockheed Martin supports a variety of alternate work schedules that provide additional flexibility to employees.
Equal Opportunity Lockheed Martin is an equal opportunity employer. Qualified candidates will be considered without regard to legally protected characteristics.
Application and Contact The application window will close in 90 days. Applicants are encouraged to apply within 5 – 30 days of the requisition posting date in order to receive optimal consideration.
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Responsibilities
Develop an understanding of mission processing code written in C++ and implement for hardware processing.
Develop, integrate, and test processor subsystem features and interfaces in FPGA hardware.
Generate requirements, create FPGA code, and develop test benches.
Basic Qualifications
Bachelor of Science or higher from an accredited college in Electrical Engineering, Computer Engineering, or related discipline, or equivalent experience/combined education.
Ability to obtain a TS/SCI Clearance required for this role.
Understanding of HDL Languages (VHDL & Verilog).
Experience designing with Vivado.
Desired Skills
Proficient in Matlab & C++.
Digital logic design experience.
Experience interfacing FPGAs with processors.
Experience with Vitis Model Composer.
Experience with Matlab HDL Coder.
Familiarity with Xilinx platforms and tools.
Knowledge of FPGA concepts like clock domains, memory hierarchies, and routing.
Demonstrated experience in ASIC / FPGA life cycle (architecture, design, simulation, verification, validation, integration & test).
Knowledge of space-grade/qualified FPGAs and ASICs.
Security Clearance This position requires a government security clearance; you must be a US Citizen for consideration.
Clearance Level: Top Secret
Benefits and Compensation Annual base salary range: $145,200 – $255,990. Benefits offered include Medical, Dental, Vision, Life Insurance, Short-Term Disability, Long-Term Disability, 401(k) match, Flexible Spending Accounts, EAP, Education Assistance, Parental Leave, Paid time off, and Holidays.
Remotes and Work Schedules Part-time Remote Telework: The employee selected will work part of the work schedule remotely and part of the schedule at a designated Lockheed Martin facility. The specific weekly schedule will be discussed during the hiring process. Lockheed Martin supports a variety of alternate work schedules that provide additional flexibility to employees.
Equal Opportunity Lockheed Martin is an equal opportunity employer. Qualified candidates will be considered without regard to legally protected characteristics.
Application and Contact The application window will close in 90 days. Applicants are encouraged to apply within 5 – 30 days of the requisition posting date in order to receive optimal consideration.
#J-18808-Ljbffr