PTR Global
Title –
FPGA Design Engineer (Must currently possess an active TS/SCI Clearance with Full-Scope Polygraph (FSP)
Location: Onsite in
Ft. Meade, MD
Duration -Permanent role
Salary Range: $200,000 – $225,000, with flexibility based on experience
We are currently seeking
FPGA Design Engineers
with an emphasis on
FPGA or ASIC design, development, and verification
using SystemVerilog, Verilog, or VHDL. The design engineer will work closely with software and system engineers to conceptualize, document, design, code, verify, and lab-debug ASIC, FPGA, and embedded firmware designs. The ideal candidate will be adaptable, motivated, customer-oriented, capable of leading a small team, and willing to mentor others while exploring new technologies.
Location:
Onsite in
Fort Wayne, MD
Qualifications
Must currently possess an active TS/SCI Clearance with Full-Scope Polygraph (FSP)
Experience using
VHDL RTL coding
(for design and/or analysis of digital circuits)
Experience with
FPGA design , synthesis, and place & route tools (e.g., Vivado, Quartus)
Experience utilizing
Verilog/SystemVerilog
and test bench development
Experience working with
Linux/Windows operating systems
Knowledge of
design simulation tools
(Mentor, Cadence, Synopsys – one or more)
Strong oral and written communication skills
You Could Also Have This
Experience with
Verilog RTL coding
Experience using
soft/hard IP cores
in FPGAs/ASICs (e.g., Zynq, MicroBlaze, RISC processors, memories, flash/NVM)
Experience in
reverse engineering
of digital designs from one or more levels of abstraction (e.g., deprocessed hardware images, GDS2 data, netlists)
Knowledge of
ASIC implementation methods/tools
(synthesis, physical layout – Cadence/Synopsys)
Knowledge of
formal verification tools
Understanding of
semiconductor manufacturing processes
Experience with
C/C , Python, Perl, or scripting languages
Education / Experience Multiple openings available for
Junior, Senior, Principal, and Sr. Principal Engineers
:
Minimum of
three (3) years’ experience
as a design engineer in integrated circuit or microelectronic component design or reverse engineering
A
Bachelor’s degree in Electrical Engineering or Computer Engineering
from an accredited college or university is required
Five (5) additional years
of hardware design engineering experience may be substituted for a bachelor’s degree
Pay Range: $200,000 – $225,000
The specific compensation for this position will be determined by a number of factors, including the scope, complexity and location of the role as well as the cost of labor in the market; the skills, education, training, credentials and experience of the candidate; and other conditions of employment. Our full-time consultants have access to benefits including medical, dental, vision and 401K contributions as well as any other PTO, sick leave, and other benefits mandated by applicable state or localities where you reside or work.
#J-18808-Ljbffr
FPGA Design Engineer (Must currently possess an active TS/SCI Clearance with Full-Scope Polygraph (FSP)
Location: Onsite in
Ft. Meade, MD
Duration -Permanent role
Salary Range: $200,000 – $225,000, with flexibility based on experience
We are currently seeking
FPGA Design Engineers
with an emphasis on
FPGA or ASIC design, development, and verification
using SystemVerilog, Verilog, or VHDL. The design engineer will work closely with software and system engineers to conceptualize, document, design, code, verify, and lab-debug ASIC, FPGA, and embedded firmware designs. The ideal candidate will be adaptable, motivated, customer-oriented, capable of leading a small team, and willing to mentor others while exploring new technologies.
Location:
Onsite in
Fort Wayne, MD
Qualifications
Must currently possess an active TS/SCI Clearance with Full-Scope Polygraph (FSP)
Experience using
VHDL RTL coding
(for design and/or analysis of digital circuits)
Experience with
FPGA design , synthesis, and place & route tools (e.g., Vivado, Quartus)
Experience utilizing
Verilog/SystemVerilog
and test bench development
Experience working with
Linux/Windows operating systems
Knowledge of
design simulation tools
(Mentor, Cadence, Synopsys – one or more)
Strong oral and written communication skills
You Could Also Have This
Experience with
Verilog RTL coding
Experience using
soft/hard IP cores
in FPGAs/ASICs (e.g., Zynq, MicroBlaze, RISC processors, memories, flash/NVM)
Experience in
reverse engineering
of digital designs from one or more levels of abstraction (e.g., deprocessed hardware images, GDS2 data, netlists)
Knowledge of
ASIC implementation methods/tools
(synthesis, physical layout – Cadence/Synopsys)
Knowledge of
formal verification tools
Understanding of
semiconductor manufacturing processes
Experience with
C/C , Python, Perl, or scripting languages
Education / Experience Multiple openings available for
Junior, Senior, Principal, and Sr. Principal Engineers
:
Minimum of
three (3) years’ experience
as a design engineer in integrated circuit or microelectronic component design or reverse engineering
A
Bachelor’s degree in Electrical Engineering or Computer Engineering
from an accredited college or university is required
Five (5) additional years
of hardware design engineering experience may be substituted for a bachelor’s degree
Pay Range: $200,000 – $225,000
The specific compensation for this position will be determined by a number of factors, including the scope, complexity and location of the role as well as the cost of labor in the market; the skills, education, training, credentials and experience of the candidate; and other conditions of employment. Our full-time consultants have access to benefits including medical, dental, vision and 401K contributions as well as any other PTO, sick leave, and other benefits mandated by applicable state or localities where you reside or work.
#J-18808-Ljbffr