Senior ASIC Design Engineer - SOC & IP Integration

A leading technology company in Beaverton is seeking an experienced ASIC Design Engineer to contribute to SOC design. This role involves writing design specifications, implementing and debugging logic designs, and collaborating with various teams to integrate complex IPs. Ideal candidates will have a Bachelor's degree and at least 10 years of relevant experience, especially in Verilog RTL Logic Design. This opportunity offers a chance to help shape innovative technologies that delight millions of customers. #J-18808-Ljbffr