Staff RFIC Design Engineer – Silicon RFICs & Tapeout

A technology innovator is seeking a Staff RFIC Design Engineer in San Jose, California. The role involves designing and developing Silicon-based RFICs, collaborating across teams, and managing technical decisions. Candidates should have a BSEE or MSEE with relevant experience, a strong background in RF design, and proficiency in simulation tools like Cadence Virtuoso. This position offers a competitive salary range of $114,400 - $220,200 per year and various benefits including healthcare and retirement plans. #J-18808-Ljbffr