Senior Analog Design Engineer - PLLs & Timing (Hybrid)

A global semiconductor company is seeking a Senior Analog Design Engineer to define and develop high-performance circuits. The ideal candidate has a master's or PhD in Electrical Engineering and over 8 years of experience in analog/mixed signal design. Responsibilities include mentoring junior designers and supporting lab testing. Located in Greenlawn, this role offers a hybrid work model, providing employees the flexibility to work remotely two days a week while collaborating in the office on designated days. #J-18808-Ljbffr