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Qualcomm

SOC Infrastructure/NoC, Power and Performance Validation Engineer (Multiple Leve

Qualcomm, San Diego, California, United States, 92189

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Company: Qualcomm Technologies, Inc.

Job Area: Engineering Group, ASICS Engineering

Job Overview Qualcomm's validation team is part of the central Global SoC digital hardware organization responsible for the overall quality of the SoC silicon. The validation team works closely with architects, designers, verification engineers, software engineers, and customers. The team is currently seeking a candidate specifically for SOC Infrastructure/NoC, Power and Performance Validation in pre‑silicon emulation and post‑silicon.

The candidate is expected to have an excellent understanding of digital design fundamentals, on‑chip interconnects, and the ability to write content to validate and analyze SOC bus architecture, performance and power.

Required Skills

SOC Bandwidth, QoS, Latency and Throughput analysis

Interconnect architectures – NoCs, AXI, AHB, etc.; knowledge of upstream and downstream operations and ability to write programs to stress their transactions for appropriate coverage

Solid expertise in various FIFO designs and related performance/functionality aspects

Come up with thorough performance validation plans and work closely with team members to ensure Performance‑Power trade‑offs are factored in

System low power modes

Dynamic clock and voltage scaling operations

Interrupt architecture

Debug architecture – interactions with JTAG based debuggers, state dump scripts

Performance monitor architecture

Thorough understanding of CPU and DDR concepts, multimedia, GPU, peripheral

Memory hierarchy and caches – coherency, consistency (ordering), memory types and attributes, synchronization & semaphores, full‑system concurrency, MTE, MPAM

Experience in embedded systems and expertise in C, C++, Python and assembly languages

Design and implementation of drivers and test content

Debugging low‑level software and hardware issues

Fundamental understanding of static, leakage, and dynamic power in a semiconductor design

Familiarity with debug tools including JTAG and kernel debuggers

Structured program development concepts

Logical thinking and problem‑solving ability with focus on power, performance and SoC system feature validation

Minimum Qualifications

Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.

Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.

PhD in Science, Engineering, or related field.

Equal Employment Opportunity Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application or hiring process, Qualcomm is committed to providing an accessible process. Qualcomm will provide reasonable accommodations to support individuals with disabilities during the hiring process.

Pay range & Other Compensation & Benefits $140,000.00 - $210,000.00

Qualcomm also offers a competitive annual discretionary bonus program and opportunities for annual RSU grants. We provide a highly competitive benefits package designed to support you at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer.

Contact If you would like more information about this role, please contact Qualcomm Careers.

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