Hands-On Post-Silicon Validation Engineer

A leading technology firm in San Jose, California, is seeking a Post-Silicon Validation Engineer. This role focuses on hands-on hardware validation in a lab environment, requiring at least 3 years of experience in electronics and signal integrity concepts. The ideal candidate will conduct extensive testing and validation for high-speed networking silicon. Competitive salary range is provided, along with benefits including health insurance, retirement plans, and paid time off. #J-18808-Ljbffr