Pivotics, LLC.
At Pivotics, we design and deliver cutting‑edge System-on-Chip (SoC) platforms that power next‑generation computing, storage, and intelligent embedded systems. Headquartered in Poland, we combine deep semiconductor expertise with a fast‑paced, collaborative engineering culture. As we expand our post‑silicon capabilities, we’re looking for a hands‑on technical leader to drive excellence across our validation team.
We are seeking an experienced
Team Leader of Validation Engineers
to lead, mentor, and scale a high‑impact team responsible for post‑silicon validation of complex SoCs. You will oversee the development and execution of system‑level validation strategies, ensure robust test coverage, and bridge gaps between silicon, firmware, and real‑world use cases. This is a hands‑on leadership role—you’ll manage people while staying deeply engaged in technical direction, debug, and quality sign‑off.
Key Responsibilities:
Lead, coach, and grow a team of 5–10 validation engineers across multiple SoC projects.
Define and drive comprehensive post‑silicon validation methodologies, from bring‑up to compliance and performance tuning.
Collaborate with architecture, design, firmware, and software teams to align on test plans, coverage goals, and risk mitigation.
Oversee development of validation software, automation scripts (Python/Tcl/C++), and lab infrastructure.
Ensure thorough validation of high‑speed interfaces (PCIe, DDR, NVMe, SPI, I2C, etc.) using protocol analyzers and lab equipment.
Guide root‑cause analysis of silicon bugs using firmware, MIPS debug environments, and hardware diagnostics.
Review schematics, support board modifications, and maintain lab readiness for prototype testing.
Champion best practices in coverage definition, regression management, and issue tracking.
Represent validation in cross‑functional reviews and contribute to tape‑out readiness decisions.
Support hiring, onboarding, and career development to build a world‑class validation team.
Required Qualifications:
Bachelor’s or Master’s degree in Computer Engineering, Electrical Engineering, or Computer Science.
7+ years of hands‑on IC/SoC validation experience, including 1+ year in a technical leadership or team lead capacity.
Proven experience validating prototype silicon in lab environments with real hardware and test equipment.
Strong knowledge of digital systems, computer architecture, and high‑speed signaling (PCIe, DDR, SERDES, etc.).
Proficiency in Python, Tcl/Tk, and C/C++ for test automation and firmware‑level debugging.
Experience working with MIPS‑based debug environments, reading schematics, and performing board‑level modifications.
Solid understanding of Linux and Windows OS environments, including driver interactions.
Demonstrated ability to define system‑ and block‑level test coverage based on specs and standards.
Excellent communication, collaboration, and mentoring skills.
Preferred Qualifications:
Experience with PCIe compliance testing or high‑speed SERDES validation.
Background in FPGA‑based pre‑silicon emulation and coverage deployment.
Knowledge of RTOS (e.g., ThreadX), low‑level firmware, or host driver development (Linux/Windows).
Familiarity with PCB design, signal integrity, or manufacturing processes.
Experience debugging protocols such as NVMe, SATA, SAS, ONFI, CXI, DOR.
Why Join Pivotics?
Lead validation for innovative SoCs that shape the future of computing.
Build and inspire a talented intercultural engineering team in a growing European tech hub.
Work with state‑of‑the‑art lab equipment, real silicon, and cross‑disciplinary experts.
Enjoy competitive compensation, professional growth, and a culture that values ownership and impact.
Ready to lead the team that ensures our silicon works flawlessly in the real world? Apply today to become Pivotics’ next Team Leader – Validation Engineering in Poland!
#J-18808-Ljbffr
We are seeking an experienced
Team Leader of Validation Engineers
to lead, mentor, and scale a high‑impact team responsible for post‑silicon validation of complex SoCs. You will oversee the development and execution of system‑level validation strategies, ensure robust test coverage, and bridge gaps between silicon, firmware, and real‑world use cases. This is a hands‑on leadership role—you’ll manage people while staying deeply engaged in technical direction, debug, and quality sign‑off.
Key Responsibilities:
Lead, coach, and grow a team of 5–10 validation engineers across multiple SoC projects.
Define and drive comprehensive post‑silicon validation methodologies, from bring‑up to compliance and performance tuning.
Collaborate with architecture, design, firmware, and software teams to align on test plans, coverage goals, and risk mitigation.
Oversee development of validation software, automation scripts (Python/Tcl/C++), and lab infrastructure.
Ensure thorough validation of high‑speed interfaces (PCIe, DDR, NVMe, SPI, I2C, etc.) using protocol analyzers and lab equipment.
Guide root‑cause analysis of silicon bugs using firmware, MIPS debug environments, and hardware diagnostics.
Review schematics, support board modifications, and maintain lab readiness for prototype testing.
Champion best practices in coverage definition, regression management, and issue tracking.
Represent validation in cross‑functional reviews and contribute to tape‑out readiness decisions.
Support hiring, onboarding, and career development to build a world‑class validation team.
Required Qualifications:
Bachelor’s or Master’s degree in Computer Engineering, Electrical Engineering, or Computer Science.
7+ years of hands‑on IC/SoC validation experience, including 1+ year in a technical leadership or team lead capacity.
Proven experience validating prototype silicon in lab environments with real hardware and test equipment.
Strong knowledge of digital systems, computer architecture, and high‑speed signaling (PCIe, DDR, SERDES, etc.).
Proficiency in Python, Tcl/Tk, and C/C++ for test automation and firmware‑level debugging.
Experience working with MIPS‑based debug environments, reading schematics, and performing board‑level modifications.
Solid understanding of Linux and Windows OS environments, including driver interactions.
Demonstrated ability to define system‑ and block‑level test coverage based on specs and standards.
Excellent communication, collaboration, and mentoring skills.
Preferred Qualifications:
Experience with PCIe compliance testing or high‑speed SERDES validation.
Background in FPGA‑based pre‑silicon emulation and coverage deployment.
Knowledge of RTOS (e.g., ThreadX), low‑level firmware, or host driver development (Linux/Windows).
Familiarity with PCB design, signal integrity, or manufacturing processes.
Experience debugging protocols such as NVMe, SATA, SAS, ONFI, CXI, DOR.
Why Join Pivotics?
Lead validation for innovative SoCs that shape the future of computing.
Build and inspire a talented intercultural engineering team in a growing European tech hub.
Work with state‑of‑the‑art lab equipment, real silicon, and cross‑disciplinary experts.
Enjoy competitive compensation, professional growth, and a culture that values ownership and impact.
Ready to lead the team that ensures our silicon works flawlessly in the real world? Apply today to become Pivotics’ next Team Leader – Validation Engineering in Poland!
#J-18808-Ljbffr