MRL Recruitment
ASIC RTL/SoC Design Engineer | MR Consulting
MRL Recruitment, Santa Clara, California, us, 95053
ASIC RTL/SoC Design Engineer
Full-time | Cutting-edge AI & In-Memory Computing | Remote-Friendly or Onsite
We are hiring on behalf of an innovative semiconductor company developing next-generation AI and in-memory computing solutions. Our client is seeking an experienced
ASIC RTL/SoC Design Engineer
to drive complex digital design projects from concept through tapeout and post-silicon validation.
Key Responsibilities: Lead RTL design, simulation, and verification for advanced ASIC/SoC products
Integrate and validate IP blocks within complex system architectures
Perform PPA analysis to balance performance, power, and area trade-offs
Collaborate with backend teams on RTL coding, synthesis, and implementation
Support post-silicon testing and debug activities
Develop reusable IP tailored for AI and in-memory computing
Mentor junior engineers and contribute to design reviews
Work cross-functionally with software, architecture, and verification teams Required Experience & Skills:
MS 5 years or PhD in Electrical Engineering with focus on RTL/SoC design
Proficient in Verilog/SystemVerilog, with hands-on experience using VCS, Verdi
Strong grasp of design flows, from RTL to tapeout
Experience with pre- and post-layout simulation
Familiarity with AMBA protocols (APB/AXI), RISC/Arm architectures
Ability to work independently and in cross-functional teams
Startup mindset with a proactive, solution-oriented approach ??????? Bonus Points For:
FPGA/ASIC experience in image processing systems
Knowledge of SoC architectures (CPU, GPU, accelerators)
Experience with UVM, P&R, STA, and power analysis tools
???????This is a chance to join a forward-thinking engineering team working on groundbreaking technology in a fast-moving environment. If you're passionate about digital design and innovation, we'd love to hear from you.
Full-time | Cutting-edge AI & In-Memory Computing | Remote-Friendly or Onsite
We are hiring on behalf of an innovative semiconductor company developing next-generation AI and in-memory computing solutions. Our client is seeking an experienced
ASIC RTL/SoC Design Engineer
to drive complex digital design projects from concept through tapeout and post-silicon validation.
Key Responsibilities: Lead RTL design, simulation, and verification for advanced ASIC/SoC products
Integrate and validate IP blocks within complex system architectures
Perform PPA analysis to balance performance, power, and area trade-offs
Collaborate with backend teams on RTL coding, synthesis, and implementation
Support post-silicon testing and debug activities
Develop reusable IP tailored for AI and in-memory computing
Mentor junior engineers and contribute to design reviews
Work cross-functionally with software, architecture, and verification teams Required Experience & Skills:
MS 5 years or PhD in Electrical Engineering with focus on RTL/SoC design
Proficient in Verilog/SystemVerilog, with hands-on experience using VCS, Verdi
Strong grasp of design flows, from RTL to tapeout
Experience with pre- and post-layout simulation
Familiarity with AMBA protocols (APB/AXI), RISC/Arm architectures
Ability to work independently and in cross-functional teams
Startup mindset with a proactive, solution-oriented approach ??????? Bonus Points For:
FPGA/ASIC experience in image processing systems
Knowledge of SoC architectures (CPU, GPU, accelerators)
Experience with UVM, P&R, STA, and power analysis tools
???????This is a chance to join a forward-thinking engineering team working on groundbreaking technology in a fast-moving environment. If you're passionate about digital design and innovation, we'd love to hear from you.