DRAM Memory Design Engineer, DMTS or SMTS - TPG

Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a DRAM Engineering Group (DEG) Design Engineer at Micron Technology, Inc. and a Distinguished or Senior Member of Technical Staff, you will be responsible for designing and analyzing digital and analog circuits used in the development of memory products. This includes simulating, optimizing, and floor planning DRAM circuits. In this position you will work and support the efforts of groups such as Product Engineering, Test, Probe, Process Integration, Assembly and Marketing to proactively design products to optimize all manufacturing functions and assure the best cost, quality, reliability, time-to-market, and customer satisfaction. You will also be responsible for parasitic modeling and assisting in design validation, reticule experiments and required tape-out revisions. Contribute to the Design and Layout of New Memory Products Implement device specifications and develop circuit solutions. Design digital and analog circuits using CMOS logic gates and transistors. Create floorplans that optimize circuit placement, signal routing, and power delivery. Design memory core circuits and optimize for sense margins, array timings, and die size. Prepare design documentation for other engineers. DRAM Circuit Verification and Validation Conduct circuit simulations using standard industry simulators such as FINESIM, HSPICE and VERILOG. Analyze circuits for power consumption, speed performance, and reliability. Model layout parasitics in simulation and verify signal routing and power supply connections. Assist with design validation, reticle experiments, and necessary tape-out revisions. Confirm simulation to silicon correlation and identify schematic edits for revisions. Maintain Technical Expertise and Provide Training Contribute to cross group communication to work towards standardization and group success. Aid in design documentation and communicating best known practices to entire department. Participate in continuing education and competitor analysis. Proactively solicit feedback from Standards, CAD, modeling, and verification groups to ensure the design quality. Drive innovation into the future Memory generations within a dynamic work environment. Manage Project Activities Lead design and layout resource allocations. Serve as the point of contact for design, layout, verification, and testing issues. Monitor progress and track tasks. Prepare project status reports for upper management. Plan and hold design reviews to discuss project progress and decisions. Minimum Qualifications 14+ years of experience in the Semiconductor industry to include the following: Bachelor's degree or equivalent experience in Computer or Electrical Engineering. CMOS Circuit Design, VLSI, and Analog Circuit Design. Knowledge and experience using Cadence Virtuoso. Understanding Physical Layout & Circuit Floor Planning. Experience simulating with FINESIM, HSPICE and VERILOG. Comprehensive understanding of Device Reliability. Expertise in DRAM sub-system architecture, specification, operation, or design. Experience leading technical projects across departments. Preferred Qualifications Master's Degree or PhD in Electrical or Computer Engineering. Excellent problem-solving and analytical skills. Self-motivated with strong problem-solving skills and an interest in discovering new solutions. In-depth knowledge of industry-specific technologies and trends in Storage/Memory. Excellent communication and interpersonal skills. 10+ years of proven ability in DRAM design, product, or system.

#J-18808-Ljbffr